Intern - Signal Integrity - Boise, ID - Main Site, United States
Originally posted 28 September 2026 by the employer.
Micron's Signal Integrity Research & Development team enables the electrical performance of DRAM, LPDRAM, NAND, HBM, and SSDs.
About the role
As a Signal Integrity Engineer, you will support the design, analysis, and validation of high-speed memory interfaces and power distribution networks across Micron's product portfolio.
What you'll do
- Support signal integrity and power integrity analysis for high-speed memory interfaces and power distribution networks through modeling, simulation, measurement, and correlation activities.
- Collaborate with silicon, package, product, validation, and system engineering teams to ensure product electrical performance.
- Develop and evaluate die, package, PCB, and system-level models to identify performance risks and optimization opportunities.
- Apply AI-enabled tools and agentic workflows to improve engineering efficiency, automate analysis, and support technical problem-solving.
- Contribute to methodology development, standards exploration, customer support activities, and documentation of technical findings.
What you'll need
- 0-2 years of relevant experience in signal integrity, power integrity, high-speed design, electrical engineering, or related technical fields.
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Physics, or a related technical field.
- Knowledge of signal integrity, power integrity, transmission lines, high-speed interfaces, PCB design, or electromagnetic fundamentals.
- Experience with electrical simulation, modeling, laboratory measurement techniques, or engineering analysis tools.
- Experience with programming, scripting, or automation using Python, MATLAB, or similar tools.
- Demonstrated ability to apply AI-enabled tools and agentic workflows.
Nice to have
- Experience with signal integrity, power integrity, high-speed SerDes, memory interfaces, or package and PCB design.
- Familiarity with industry-standard SI/PI simulation and modeling tools.
- Knowledge of DRAM, LPDDR, HBM, NAND, SSD, or other memory technologies.
- Experience developing automation solutions, data analysis workflows, or engineering productivity tools using Python.
- Experience using AI assistants, large language models (LLMs), or AI-enabled engineering workflows such as Copilot, Claude, GPT, Gemini, or agentic automation platforms.
- Familiarity with industry standards such as JEDEC, ONFI, IBIS, or related interface specifications.
Skills: Signal Integrity, Power Integrity, High-speed memory interfaces, Modeling, Simulation, PCB design
This role has been open 17 days — well below the 70-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
238
|
Median days open
70 d
|
Median salary
$182k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (238 roles · 48 employers) |
|---|---|---|
| Open roles in this specialty | 14 | 238 |
| Open roles in the wider Analog & Mixed-Signal family | 48 | 1423 · 106 employers |
| Median days open | 54 d | 70 d (−16 d vs this employer) |
| Median salary (USD postings) | — | $182k |
Skills observed across this category: Signal Integrity, Power Integrity, High-speed memory interfaces, Modeling, Simulation, PCB design
Who's hiring in this category
- Synopsys · 31 open roles · median 31 d
- AMD · 29 open roles · median 37 d
- Qualcomm · 20 open roles · median 58 d
- Cadence Design Systems · 18 open roles · median 170 d
- Micron Technology (this employer) · 14 open roles · median 54 d
- Apple · 12 open roles · median 17 d
How we counted: 238 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 48 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.