Intern - Memory & System Architecture Research
$50 - $56 USD yearly
Originally posted 3 September 2026 by the employer.
Contribute to a system-modeling capability that evaluates memory-centric architectures across rack-scale AI platforms.
About the role
This internship involves developing and validating a first-principles system-modeling capability that evaluates memory-centric architectures across rack-scale AI platforms. You will help build and validate performance models for advanced memory systems by translating AI workload trends into memory capacity, bandwidth, and latency requirements.
What you'll do
- Analyze AI training and inference workloads to derive memory bandwidth, capacity, and latency requirements.
- Contribute to analytical and simulation models that evaluate memory-centric system architectures at scale.
- Assess system-level tradeoffs across emerging memory and integration technologies.
- Benchmark models against reference data to improve accuracy and ensure reproducible results.
- Produce system-level performance, efficiency, and cost analyses that inform architectural decisions.
- Capture findings in internal technical reports and contribute to invention disclosures where applicable.
What you'll need
- Currently pursuing an M.S. or Ph.D. in Computer Architecture, Computer Engineering, Electrical Engineering, or a related field.
- Strong background in computer architecture and system-level performance analysis (memory hierarchy, bandwidth, latency, scaling).
- Ability to analyze complex memory and AI performance challenges and reason about tradeoffs quantitatively.
- Proficiency in Python for building analytical models and performance analysis.
- Good verbal and written communication and problem-solving abilities.
Nice to have
- Understanding of memory architectures (HBM, DDR, LPDDR, CXL, emerging memories) and their impact on AI/ML workloads.
- Understanding of near-memory and advanced integration technologies — 3D stacking, chiplets, interposers, heterogeneous packaging — and their system-level tradeoffs.
- Experience with AI systems and accelerators (GPU/ASIC), performance benchmarking, or design-space exploration.
- Familiarity with simulation frameworks and reproducible experimentation.
Skills: memory hierarchy, system-level performance analysis, AI/ML workloads, chiplets, HBM
This role has been open 31 days — well below the 75-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
442
|
Median days open
75 d
|
Median salary
$236k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (442 roles · 64 employers) |
|---|---|---|
| Open roles in this specialty | 18 | 442 |
| Open roles in the wider Digital Design & Verification family | 103 | 3109 · 114 employers |
| Median days open | 121 d | 75 d (+46 d vs this employer) |
| Median salary (USD postings) | — | $236k |
Skills observed across this category: memory hierarchy, system-level performance analysis, AI/ML workloads, chiplets, HBM
Who's hiring in this category
- Qualcomm · 71 open roles · median 82 d
- NVIDIA · 57 open roles · median 59 d
- AMD · 36 open roles · median 61 d
- Arm Holdings · 27 open roles · median 102 d
- Renesas Electronics · 22 open roles · median 59 d
- NXP Semiconductors · 20 open roles · median 104 d
How we counted: 442 open SoC/Chip Architecture (SOC Architecture) roles from 64 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.