Intern - DRAM Design Engineer - Boise, ID - Main Site, United States
Originally posted 10 August 2026 by the employer.
This role focuses on DRAM Design.
About the role
This role involves the design, analysis, verification, and optimization of digital, analog, and mixed-signal circuits for memory products. The intern will apply Artificial Intelligence and AI Assisted methodologies to improve design workflows, automation, and quality.
What you'll do
- Contribute to the development of new memory products through circuit build, layout, optimization, and validation of Memory, Logic, and Analog circuits.
- Support physical design activities including parasitic modeling, floor-planning, placement, routing, reticle experiments, tape-out revisions, and design verification using industry-standard simulation tools.
- Collaborate with global design, verification, product engineering, test, process integration, assembly, and marketing teams to improve manufacturability, quality, and product performance.
- Engage with CAD, modeling, standards, and verification teams to improve design methodologies and overall design quality.
- Develop AI Assisted software tools and leverage Artificial Intelligence to enhance design methodologies, workflow automation, engineering productivity, and design quality.
What you'll need
- Currently pursuing a Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
- Must be continuing academic studies through at least Fall 2027 and not graduate before Fall 2027.
- Coursework, academic projects, or research experience in digital design, analog design, semiconductor devices, VLSI, or computer architecture.
- Experience preparing and presenting technical findings through reports, presentations, or project evaluations.
Nice to have
- Experience with circuit simulation, verification, modeling, or industry-standard EDA tools.
- Understanding of semiconductor manufacturing, memory architecture, or DRAM design concepts.
- Familiarity with physical design concepts including floor-planning, placement, routing, parasitic extraction, or layout optimization.
- Experience Applying AI, Using AI, or Leveraging Artificial Intelligence to improve engineering workflows, automation, software development, or technical analysis.
- Exposure to AI Assisted tools, Generative AI, Agentic AI, LLMs, or AI-Enabled software solutions for engineering productivity and design optimization.
Skills: DRAM Design, memory products, circuit build, layout optimization, physical design, AI Assisted methodologies
This role has been open 55 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: DRAM Design, memory products, circuit build, layout optimization, physical design, AI Assisted methodologies
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.