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pSemi

Intern, Digital Design - Fall 2026 - San Diego, CA, United States

pSemi San Diego, CA, United States Internship 2 months ago
Digital Design & SoC Architecture

$32 - $58 USD hourly

Originally posted 10 August 2026 by the employer.

About the role

This position is for a design verification/validation intern for Analog Mixed-Signal and Digital products. The intern will assist in developing, verifying, characterizing, validating, and supporting circuit IP blocks for product development.

What you'll do

  • Develop and simulate self-checking, functional design verification, and validation test benches
  • Develop FPGA systems using logic design and RTL coding
  • Debug FPGA prototypes using logic analyzers, oscilloscopes and signal generators
  • Modify C code controlling automated test equipment

What you'll need

  • Ability to develop RTL and run Verilog simulations
  • Familiarity with FPGA development tools and lab debug of FPGA design projects
  • Familiarity with sequential and combinational logic, finite state machines, data path components such as adders, comparators, subtractors, multipliers, shifters, counters, timers
  • Familiarity with timing, metastability, setup/hold constraints
  • Familiarity with memory components, storage elements
  • Familiarity with software techniques, particularly programming in Python
  • Familiarity with digital logic design and synthesis
  • Understanding of CMOS silicon circuits
  • Familiarity with operating lab equipment, including DIO, SMUs, and oscilloscopes

Nice to have

  • Experience with serial interface protocols such as SPI or I2C
  • Experience with Cadence CAD tools, Simvision/Xcelium simulator, Genus synthesis, Innovus Auto Place, and Route
  • Understanding of test vectors and digital test concepts
  • Experience in ASIC front-end implementation tool flows and silicon bring-up
Market context

This role has been open 68 days — slightly above the 61-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1024
Median days open
61 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How pSemi compares in Digital/RTL Design hiring
Metric pSemi All employers we track in this specialty (1024 roles · 103 employers)
Open roles in this specialty 1 1024
Open roles in the wider Digital Design & Verification family 1 3202 · 115 employers
Median days open 68 d 61 d (+7 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm · 140 open roles · median 63 d
  • Synopsys · 86 open roles · median 31 d
  • AMD · 71 open roles · median 37 d
  • Analog Devices · 47 open roles · median 49 d
  • NVIDIA · 44 open roles · median 59 d
  • NXP Semiconductors · 42 open roles · median 85 d

How we counted: 1024 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

pSemi

pSemi

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San Diego, CA, United States
On-site
Internship
$32 - $58 USD hourly
2 months ago

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