Originally posted 23 September 2026 by the employer.
Work on High Bandwidth Memory (HBM) memory solutions.
About the role
As an HBM Design Engineer Intern, you will gain hands-on experience in semiconductor design, simulation, verification, and analysis.
What you'll do
- Assist with the design, simulation, analysis, and verification of HBM memory and logic circuits.
- Support RTL development, circuit implementation, timing analysis, power analysis, and functional validation activities.
- Develop scripts, automation solutions, and AI-Assisted workflows to improve design productivity.
- Collaborate with Design, Verification, Physical Design, CAD, and Product Engineering teams on technical reviews and debug activities.
- Document technical work, experimental results, AI-Enabled insights, and design methodologies.
What you'll need
- Currently pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- Completed coursework in Digital Logic Design, CMOS Circuits, Computer Architecture, VLSI Design, Semiconductor Devices, or related subjects.
- Demonstrated understanding of combinational and sequential logic design concepts.
- Experience with Verilog, SystemVerilog, or VHDL through academic, research, or project work.
- Programming experience in Python, Perl, Tcl, C/C++, or similar languages.
Nice to have
- Knowledge of memory architectures such as DRAM, SRAM, DDR, LPDDR, or HBM.
- Experience with RTL design, simulation, synthesis, timing analysis, verification methodologies, or functional coverage concepts.
- Familiarity with Linux/Unix environments, scripting, and automation techniques.
- Exposure to semiconductor EDA tools such as VCS, Xcelium, Questa, PrimeTime, Innovus, Virtuoso, or similar platforms.
- Previous academic, research, or internship experience related to VLSI, ASIC, FPGA, semiconductor design, or applying AI to engineering workflows and analysis.
Skills: HBM memory, RTL development, circuit implementation, timing analysis, functional validation
This role has been open 11 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: HBM memory, RTL development, circuit implementation, timing analysis, functional validation
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.