[India] RTL Integration (Frontend) Engineer - Hyderabad Knowledge City, India
Integrate proprietary Dynamic Neural Accelerator (DNA) IP and third-party IP into edge AI SoC architectures.
About the role
As an RTL Integration (Frontend) Engineer on the Artificial Intelligence Hardware Team, you will integrate EdgeCortix Dynamic Neural Accelerator (DNA) IP and third-party IPs into ASSP and SoC architectures.
What you'll do
- Own IP integration into ASSP/SoC, integrating EdgeCortix DNA IP and third-party IP blocks. - Run front-end design checks, including RTL rule checkers (Lint), CDC, RDC, and LEC. - Perform RTL design, synthesis, static timing analysis (STA), and RTL/netlist power analysis. - Generate design constraints and perform constraints analysis, ECO flows, elab checks, and physical synthesis. - Support integration flow automation and improvements. - Support verification infrastructure development involving VIPs, memory models, and monitors.
What you'll need
- 4-7 years of relevant experience covering RTL integration, front-end design checks, STA, and PPA. - Solid proficiency with Verilog, C/C++, and scripting languages including Tcl, Ruby, Perl, Python, or Makefile. - Practical experience with RTL rule checkers (Lint), CDC, RDC, and LEC (formal equivalence). - Working knowledge of protocols and IP such as PCIe/UCIe, AXI, DDR, or NIC. - Understanding of gate level netlists and physical design flows. - Experience with FPGA integration and knowledge of Chisel-based environments.
Nice to have
- RISC V integration experience. - Cadence tool chain experience. - Prior CPU/Memory/Bus integration at subsystem level. - Strong synthesis, timing analysis, and power analysis experience. - Scripting experience with Perl or Python.
This role has been open 124 days — well above the 66-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1081
|
Median days open
66 d
|
Median salary
$185k
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See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | EdgeCortix | All employers we track in this specialty (1081 roles · 104 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 1081 |
| Open roles in the wider Digital Design & Verification family | 8 | 3359 · 116 employers |
| Median days open | 124 d | 66 d (+58 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 158 open roles · median 63 d
- Synopsys · 86 open roles · median 40 d
- AMD · 77 open roles · median 45 d
- Analog Devices · 49 open roles · median 56 d
- NXP Semiconductors · 44 open roles · median 100 d
- NVIDIA · 37 open roles · median 52 d
How we counted: 1081 open Digital/RTL Design (RTL Design) roles from 104 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.