$91,100 - $146,000 USD yearly
Physical implementation of custom CMOS ASICs across 3 nm and smaller process nodes operating at speeds exceeding 1 GHz.
Originally posted 11 November 2026 by the employer.
About the role
This design engineering position focuses on the physical implementation of custom CMOS ASICs within the Custom Silicon Design Team. The work spans process nodes down to 3 nm and smaller operating at speeds exceeding 1 GHz, from concept through production.
What you'll do
- Contribute to the physical design implementation of large-scale ASICs with multi-hundred-million gate complexity.
- Support core physical design activities including floorplanning, placement, clock tree synthesis, routing, timing closure, and physical verification (DRC/LVS).
- Assist with block-level integration, static timing analysis, power planning, IR/EM checks, post-route optimization, and design signoff.
- Utilize commercial and in-house EDA tools to support implementation, verification, and deep sub-micron methodology development.
- Contribute to design flow automation across the complete flow from RTL to GDSII and silicon bring-up.
- Interface with customers and internal stakeholders to support technical discussions and design reviews.
What you'll need
- Bachelor’s degree in Electrical or Computer Engineering with 5+ years of related experience, Master’s degree with 3+ years of related experience, or a Ph.D.
- Solid understanding of VLSI design, CMOS logic, and digital circuit fundamentals.
- Practical knowledge of ASIC physical design concepts including placement, routing, and timing.
- Proficiency working in UNIX/Linux environments.
- Working knowledge of TCL scripting.
Nice to have
- Familiarity with Python or Perl.
- Exposure to EDA tools such as Cadence Innovus, Synopsys ICC2, or PrimeTime.
Skills: physical design, floorplanning, placement, routing, timing closure, DRC/LVS
More semiconductor jobs: Broadcom jobs · Physical design jobs
First seen in our index 2 days ago, well below the 62-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
753
|
Median days since first seen
62 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (753 roles · 90 employers) |
|---|---|---|
| Open roles in this specialty | 53 | 753 |
| Open roles in the wider Physical Implementation family | 58 | 1689 · 121 employers |
| Median days since first seen | 24 d | 62 d (+38 d vs this employer) |
| Median salary (USD postings) | n/a | $187k |
Skills observed across this category: physical design, floorplanning, placement, routing, timing closure, DRC/LVS
Who's hiring in this category
- Qualcomm · 119 open roles · median 66 d
- AMD · 66 open roles · median 45 d
- Broadcom (this employer) · 53 open roles · median 24 d
- NVIDIA · 46 open roles · median 85 d
- Synopsys · 44 open roles · median 43 d
- Apple · 32 open roles · median 8 d
How we counted: 753 open Physical Design (Physical Design) roles from 90 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Physical Implementation family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.