HPC DDR Controller Design Engineer / Leader - Kodaira, Japan
Originally posted 4 September 2026 by the employer.
About the role
This role involves the development of DDR memory subsystems within automotive SoCs, specifically for the R-Car series.
What you'll do
- Develop DDR memory subsystems for automotive SoCs (R-Car series).
- Engage in specification review, microarchitecture design, RTL design, verification, debugging, and performance evaluation for DDR memory controllers.
- Design with consideration for SoC-wide consistency, addressing memory bandwidth, latency, QoS, refresh, low-power control, and error handling requirements.
- Collaborate with DDR PHY, interconnect, CPU/accelerator, and software teams to align interface specifications and resolve technical challenges.
- Lead technical discussions, define design policies, conduct design reviews, and facilitate agreement among stakeholders for assigned areas or subsystems.
- Handle external IP integration, including specification confirmation with vendors, constraint definition, and technical issue resolution.
What you'll need
- 5+ years of digital circuit design or verification experience in SoC or IP development, including RTL design, verification, debugging, specification review, and design review.
- Design or verification experience with memory controllers, memory peripheral circuits, or data transfer control.
- Experience in translating requirement specifications into circuit specifications and verification items based on design specifications and technical documents.
- Experience collaborating with internal and external teams to resolve technical issues through discussions.
- Experience in defining design policies and technical challenges for assigned areas and achieving consensus with stakeholders.
- Ability to read and write technical documents in English, and comfort with business communication with global teams.
Skills: DDR memory controller, RTL design, microarchitecture, LPDDR, AXI
This role has been open 31 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 287 |
| Median days open | 31 d | 69 d (−38 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: DDR memory controller, RTL design, microarchitecture, LPDDR, AXI
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.