Skip to main content
Synopsys

Hardware / Software System Performance Expert

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Munich, Germany 11 days ago
Digital Design & SoC Architecture

Originally posted 24 September 2026 by the employer.

About the role

This role involves developing performance models and architectural evaluation methodologies for semiconductor systems.

What you'll do

  • Develop architecture exploration methodologies for SoC, multi-die, and chiplet-based systems.
  • Build performance models and virtual prototyping environments using C/C++, Python, and SystemC.
  • Create benchmarks, workloads, and design-space exploration tools for complex hardware/software systems.
  • Collaborate with architecture, IP, software, and verification teams to define modeling approaches and validation strategies.
  • Drive technical thought leadership by publishing findings, presenting at conferences, and contributing to standards bodies.
  • Contribute to reference platforms and technical demonstrations showcasing Synopsys IP, EDA tools, and system-level solutions.

What you'll need

  • MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • 8+ years of hands-on experience in system architecture, performance modeling, hardware/software co-design, or semiconductor verification.
  • Strong proficiency in C/C++ and Python for performance-critical modeling, algorithm development, automation, and tooling.
  • Deep experience with hardware design and verification, including RTL development, simulation, debug, and performance characterization of complex SoC or multi-die systems.
  • Proven track record of technical communication through publications, conference presentations, patents, or contributions to industry standards and technical communities.
  • Experience with virtual prototyping, design-space exploration tools, or simulation frameworks for architecture evaluation.

Skills: architecture exploration methodologies, performance models, virtual prototyping, chiplet interconnects, multi-die performance

Market context

This role has been open 1 day — well below the 72-day median for SoC/Chip Architecture roles.

SoC/Chip Architecture · SOC Architecture

Open roles in category
431
Median days open
72 d
Median salary
$238k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Synopsys compares in SoC/Chip Architecture hiring
Metric Synopsys All employers we track in this specialty (431 roles · 64 employers)
Open roles in this specialty 1 431
Open roles in the wider Digital Design & Verification family 142 3050 · 114 employers
Median days open 1 d 72 d (−71 d vs this employer)
Median salary (USD postings) — $238k

Skills observed across this category: architecture exploration methodologies, performance models, virtual prototyping, chiplet interconnects, multi-die performance

Who's hiring in this category

  • Qualcomm · 72 open roles · median 77 d
  • NVIDIA · 56 open roles · median 51 d
  • AMD · 35 open roles · median 79 d
  • Arm Holdings · 27 open roles · median 94 d
  • NXP Semiconductors · 19 open roles · median 96 d
  • Renesas Electronics · 16 open roles · median 119 d

How we counted: 431 open SoC/Chip Architecture (SOC Architecture) roles from 64 employers tracked in the SemiconductorJobs index, counted 27 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Synopsys

Synopsys

Apply now
img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Munich, Germany
On-site
11 days ago

Share this job