FPGA Engineer - Zagreb, Croatia
Originally posted 26 May 2026 by the employer.
Develop and integrate FPGA-based solutions for Open RAN Radio Units on Xilinx Zynq platforms.
About the role
This role contributes to the development and evolution of Eridan's Open RAN Radio Unit (RU) platform.
What you'll do
- Design, develop, and integrate FPGA-based solutions for Open RAN Radio Units. - Implement and optimize digital signal processing (DSP) algorithms for high-performance compute applications. - Work with Xilinx (AMD) FPGA technologies, including Zynq-based platforms. - Integrate and validate designs using Vivado, ensuring timing closure, proper routing, and backend implementation correctness. - Participate in board bring-up, debugging, and hardware validation processes. - Analyze and troubleshoot performance bottlenecks across FPGA and system-level designs.
What you'll need
- 3–6 years of experience in FPGA design and development. - Strong understanding of digital signal processing (DSP) concepts and their hardware implementation. - Hands-on experience with Xilinx (AMD) tools and platforms, especially Vivado and Zynq. - Experience with RTL design using VHDL, Verilog, or SystemVerilog, and simulation workflows. - Experience with timing closure, synthesis, and place-and-route processes. - Experience with Siemens Questa simulation tools, hardware debugging tools, board bring-up, Git, and Linux scripting.
Nice to have
- Experience with Xilinx Versal platforms. - Background in telecommunications systems. - Familiarity with Open RAN architecture and related protocols. - Experience with high-speed interfaces and data movement, such as Ethernet, PTP, SyncE, and JESD204.
This role has been open 124 days — well above the 63-day median for FPGA Design roles.
FPGA Design · RTL Design
|
Open roles in category
108
|
Median days open
63 d
|
Median salary
$162k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Eridan | All employers we track in this specialty (108 roles · 25 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 108 |
| Median days open | 124 d | 63 d (+61 d vs this employer) |
| Median salary (USD postings) | — | $162k |
Who's hiring in this category
- Altera · 37 open roles · median 61 d
- AMD · 12 open roles · median 59 d
- Teradyne · 9 open roles · median 79 d
- Qualcomm · 8 open roles · median 51 d
- Microchip Technology · 6 open roles · median 77 d
- Keysight Technologies · 5 open roles · median 3 d
How we counted: 108 open FPGA Design (RTL Design) roles from 25 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.