Foundation IP Design Engineer - Singapore-Yishun, Singapore
Originally posted 20 August 2026 by the employer.
About the role
This role involves the development of memory compilers and custom macros within the Central Engineering Group.
What you'll do
- Analyze memory architectures and their tradeoffs.
- Design and build memory or circuit blocks at the gate or transistor level.
- Simulate and analyze circuit designs using transistor level simulators.
- Extract layout, perform post-layout simulations and verification.
- Integrate characterization flow to extract timing and power information.
- Develop scripts to automate characterization flow, simulations, and verification.
What you'll need
- Knowledge in development of memory compilers or custom digital circuits (SRAMs, Register-files, Multi-ports, ROM).
- Good understanding of transistor level circuit behavior and device physics.
- Good understanding of signal integrity, EM/IR, and reliability analysis.
- Understanding of memory behavioral and physical models.
- Understanding of DFT schemes and chip level integration.
- BS in Electrical Engineering and 5+ years of related experience.
Nice to have
- Familiarity with test setups, silicon testing and debug.
Skills: memory architectures, memory compilers, transistor level circuit behavior, layout, DFT schemes
This role has been open 46 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 16 | 287 |
| Median days open | 51 d | 69 d (−18 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: memory architectures, memory compilers, transistor level circuit behavior, layout, DFT schemes
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom (this employer) · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.