Executive Director SOC Physical Design
Lead physical design strategy, methodology, and tape-out sign-off for complex SoCs and HPC controller IP using Fusion Compiler.
Originally posted 9 November 2026 by the employer.
About the role
This role provides strategic, technical, and organizational leadership for physical design and implementation across complex SoCs, subsystems, and HPC controller IP. You will lead a multi-site physical design organization accountable for physical feasibility, implementation readiness, and design closure across customer engagements and advanced ASIC technology nodes.
What you'll do
- Own physical design strategy, planning, execution, and sign-off for complex SoCs, subsystems, IP, and HPC controller products.
- Lead end-to-end physical implementation, including floor planning, hierarchical design, placement, clock tree synthesis, routing, timing closure, power optimization, physical verification, and tape-out readiness.
- Drive timing closure, power optimization, congestion resolution, constraint quality, and implementation efficiency using Synopsys tool flows such as Fusion Compiler.
- Account for physical feasibility and implementation readiness of soft IP releases through practical P&R validation across representative configurations.
- Partner with architecture, RTL design, verification, and emulation teams to resolve implementation tradeoffs and guide structural improvements for physical closure.
- Work directly with customers to scope feasibility, estimate effort, and support floorplan development, P&R execution, and design closure on customer technology nodes.
What you'll need
- BS or MS in Electronics, Electrical Engineering, or a related discipline, with approximately 20+ years of relevant semiconductor experience preferred.
- Deep expertise in physical design with a proven track record of hardening complex designs through tape-out readiness.
- Hands-on knowledge of floor planning, placement, clock tree synthesis, routing, static timing analysis, timing closure, power optimization, hierarchical implementation, constraints, and physical sign-off.
- Experience with Synopsys physical implementation tool flows, including Fusion Compiler, or equivalent advanced-node implementation platforms.
- Proven track record leading large, geographically distributed physical design engineering teams and managing resources across concurrent programs.
- Experience evaluating physical feasibility to guide architecture and RTL teams toward implementation-friendly designs.
Skills: Physical Design, P&R, Floorplanning, Timing Closure, Fusion Compiler, CTS
More semiconductor jobs: Synopsys jobs · Physical design jobs · Sunnyvale jobs
First seen in our index 0 days ago, well below the 62-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
713
|
Median days since first seen
62 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (713 roles · 87 employers) |
|---|---|---|
| Open roles in this specialty | 44 | 713 |
| Open roles in the wider Physical Implementation family | 114 | 1614 · 117 employers |
| Median days since first seen | 41 d | 62 d (+21 d vs this employer) |
| Median salary (USD postings) | n/a | $187k |
Skills observed across this category: Physical Design, P&R, Floorplanning, Timing Closure, Fusion Compiler, CTS
Who's hiring in this category
- Qualcomm · 106 open roles · median 61 d
- AMD · 64 open roles · median 42 d
- Broadcom · 46 open roles · median 33 d
- NVIDIA · 46 open roles · median 82 d
- Synopsys (this employer) · 43 open roles · median 41 d
- Intel Corporation · 31 open roles · median 33 d
How we counted: 713 open Physical Design (Physical Design) roles from 87 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Physical Implementation family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.