Engineer, HIG HBM LAYOUT - Hyderabad - Phoenix Aquila, India
Originally posted 13 July 2026 by the employer.
This role contributes to High Bandwidth Memory (HBM) for artificial intelligence and high-performance computing solutions.
About the role
This role involves the design and development of critical analog, mixed-signal, and custom digital blocks, along with full-chip level integration support. You will contribute to advanced applications including artificial intelligence and high-performance computing solutions with High Bandwidth Memory (HBM).
What you'll do
- Design and develop critical analog, mixed-signal, custom digital block, and full chip level integration support.
- Perform layout verification including LVS/DRC/Antenna checks, quality assurance, and documentation support.
- Deliver block-level layouts on time with acceptable quality.
- Guide peer team-members in the execution of sub block-level layouts and review critical items.
What you'll need
- 2 to 5 years' experience in analog/custom layout design in advanced CMOS process, including Planar and FinFET technology nodes.
- Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS.
- Hands-on experience creating layouts for critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier.
- Good understanding of Analog Layout fundamentals (e.g., Matching, Electromigration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices).
- Understanding of layout effects on circuit characteristics such as speed, capacitance, power, and area.
Skills: IC layout design, Cadence VLE/VXL, Mentor Graphic Calibre DRC/LVS, Analog Layout fundamentals, Memory designs, custom layout design
This role has been open 160 days — well above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: IC layout design, Cadence VLE/VXL, Mentor Graphic Calibre DRC/LVS, Analog Layout fundamentals, Memory designs, custom layout design
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.