Early Career - GPU Top Level Physical Design Engineer - Cambridge
Originally posted 6 October 2026 by the employer.
About the role
As an Early Career - GPU Top Level Physical Design Engineer, you will be responsible for implementing complete chip design from netlist to tapeout, with hands-on experience in physical design and large chip integration.
What you'll do
- Collaborate with the frontend team to understand RTL and drive physical aspects early in the design cycle.
- Develop methodologies and best known methods for GPU design.
- Develop Physical Design guidelines and checklists, drive execution, and supervise progress.
- Act as the focal point for place and route integration at the top level.
- Communicate and drive Physical Design needs with cross-functional teams.
What you'll need
- Minimum of BSc/MSc in EE and some relevant experience.
- Familiarity with ASIC integration including Floorplanning, Clock and Power distribution, global signal planning, I/O planning, and hard IP integration.
- Experience with hierarchical design approach, top-down design, budgeting, timing and physical convergence.
- Experience with Floorplanning tools, P&R flows, global timing verification, and Physical Design Verification Flows.
Nice to have
- Experience integrating IP from both internal and external vendors and specifying/driving IP requirements in the physical domain.
- Experience with Physical Design topics: multiple voltage and clock domains, ESD solutions, and mixed signal block integration.
- Experience with large subsystem designs (>20M gates) with frequencies in excess of 1GHz applying new technologies.
- Familiarity with process related design issues including Design for Yield and Manufacturability, multi Vt strategies and thermal Management.
- Understanding of GPU architecture and design units.
Skills: Floorplanning, Clock and Power distribution, I/O planning, Physical Design Verification Flows, P&R flows
This role has been open 0 days — well below the 60-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
631
|
Median days open
60 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (631 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 14 | 631 |
| Open roles in the wider Physical Implementation family | 34 | 1430 · 108 employers |
| Median days open | 14 d | 60 d (−46 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: Floorplanning, Clock and Power distribution, I/O planning, Physical Design Verification Flows, P&R flows
Who's hiring in this category
- Qualcomm · 122 open roles · median 38 d
- AMD · 49 open roles · median 21 d
- Broadcom · 40 open roles · median 85 d
- NVIDIA · 37 open roles · median 60 d
- Synopsys · 29 open roles · median 48 d
- Micron Technology · 25 open roles · median 75 d
How we counted: 631 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 6 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.