Director, Verification – US & Europe - Austin, United States
$166,600 - $309,400 USD yearly
Originally posted 11 August 2026 by the employer.
About the role
This role involves directing the Verification Organization in US and Europe for IP / Sub-system / SoC Verification, focusing on Wireless MCU SoCs.
What you'll do
- Lead the Verification Organization in US and Europe for IP / Sub-system / SoC Verification.
- Develop and drive the US and Europe verification teams towards Gen-AI based verification.
- Build skills in MCU architecture from IP to SoC and deliver multiple products.
- Develop a solid foundation in MCU infrastructure (clocks / reset / low power / interconnects/ wireless data paths).
- Work cross-functionally with Architecture / Digital & Wireless Design / Backend Implementation Teams to establish solid foundation and handoffs for Formal/Functional/UPF based verification.
- Enhance Quality Management System to ensure process adherence and critical systemic processes for project quality and resourcing.
What you'll need
- Bachelor’s or master’s degree in electrical and/or Computer Engineering.
- 15+ years of experience in Chip Design / Verification Role.
- Strong proven industry knowledge on architecture & verification methodologies in Chip Infrastructure (MCU/Memories/Peripherals/Interconnect/Clocks/Reset/Low Power).
- Knowledge of wireless protocols to help develop critical skills for data-path verification.
- Experience in AI platforms like Cursor / Claude.
- Experience in managing teams and building capabilities from the ground up.
- Knowledge of Mixed Signal Design Styles (Analog Design and Integration, RNM modelling, MCU infrastructure elements like clocks/reset/interconnects/IO).
- Strong experience in Formal / Functional / UPF based verification / Coverage to define verification strategies.
- Knowledge of Chip Boot Flow / Security Architecture.
Skills: IP / Sub-system / SoC Verification, Gen-AI based verification, Formal/Functional/UPF based verification, MCU architecture, wireless data paths
This role has been open 67 days — slightly above the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1205
|
Median days open
64 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Silicon Labs | All employers we track in this specialty (1205 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 1205 |
| Open roles in the wider Digital Design & Verification family | 19 | 3202 · 115 employers |
| Median days open | 43 d | 64 d (−21 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: IP / Sub-system / SoC Verification, Gen-AI based verification, Formal/Functional/UPF based verification, MCU architecture, wireless data paths
Who's hiring in this category
- Qualcomm · 110 open roles · median 38 d
- AMD · 96 open roles · median 51 d
- NVIDIA · 86 open roles · median 58 d
- Synopsys · 64 open roles · median 32 d
- SiFive · 55 open roles · median 74 d
- Cadence Design Systems · 50 open roles · median 116 d
How we counted: 1205 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.