Director of Engineering for ML hardware design & Architecture
$228,400 - $342,600 USD yearly
Originally posted 24 November 2025 by the employer.
About the role
This role leads the definition, analysis, and micro-architecture of ML hardware accelerator designs, focusing on vision applications for mobile and emerging products. You will work on ML hardware accelerators targeting computer vision workloads like image classification, object detection, and video analytics.
What you'll do
- Architect ML hardware accelerator designs and define micro-architecture for efficient implementation of ML algorithms. - Analyze and optimize hardware designs for performance, power, and area (PPA) tradeoffs. - Lead hardware IP development alongside RTL design, verification, synthesis, and physical design teams. - Use models, simulators, profilers, and hardware to quantitatively justify architectural decisions. - Apply knowledge of CPUs, GPUs, DSPs, memory, and bandwidth analysis to ML hardware design. - Invent and file patents for hardware solutions.
What you'll need
- Bachelor's degree in Computer or Electrical Engineering, Computer Science, or related field and 8+ years of engineering experience (or Master's degree with 7+ years, or PhD with 6+ years). - Experience in hardware development for ML, multimedia, or accelerator technologies such as vision, imaging, video, display, or audio. - Experience with architecture/micro-architecture of ML or multimedia cores, and SoC bus, interconnect, and memory technologies. - Hands-on experience with simulators, performance/power models, and VLSI design and verification (Verilog, SystemVerilog, or HLS). - Programming experience in C, C++, or SystemC, along with scripting and automation skills. - Experience with ML frameworks and accelerator standards such as TensorFlow Lite or ONNX.
Nice to have
- Deep domain knowledge in ML for vision, including image/video processing and neural network architectures for vision. - Experience collaborating with global teams across multiple time zones and cultures. - Experience working with synthesis and physical design teams for HW IP development and PPA improvement. - Demonstrated technical and people leadership.
Skills: ML hardware accelerator, computer vision, PPA optimization, hardware micro-architecture, RTL design, SystemC
This role has been open 200 days — well above the 87-day median for AI/ML Hardware Engineering roles.
AI/ML Hardware Engineering · AI ML Hardware
|
Open roles in category
506
|
Median days open
87 d
|
Median salary
$236k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (506 roles · 77 employers) |
|---|---|---|
| Open roles in this specialty | 104 | 506 |
| Open roles in the wider Software, Firmware & Systems family | 735 | 6250 · 144 employers |
| Median days open | 116 d | 87 d (+29 d vs this employer) |
| Median salary (USD postings) | — | $236k |
Skills observed across this category: ML hardware accelerator, computer vision, PPA optimization, hardware micro-architecture, RTL design, SystemC
Who's hiring in this category
- Qualcomm (this employer) · 105 open roles · median 116 d
- NVIDIA · 89 open roles · median 58 d
- AMD · 33 open roles · median 107 d
- Micron Technology · 26 open roles · median 59 d
- Mobileye · 20 open roles · median 85 d
- Analog Devices · 18 open roles · median 43 d
How we counted: 506 open AI/ML Hardware Engineering (AI ML Hardware) roles from 77 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.