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Synopsys

Director ASIC Digital Design

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Austin, Texas, United States 2 months ago
Digital Design & SoC Architecture

Originally posted 20 August 2026 by the employer.

Synopsys is seeking a Director ASIC Digital Design to lead digital design and pre-silicon verification teams focused on Interface IP technologies such as PCIe, CXL, DDR, and Ethernet.

About the role

This role involves leading digital design and pre-silicon verification teams for Interface IP technologies, overseeing execution from architecture through silicon validation and customer deployment.

What you'll do

  • Lead and grow digital design and pre-silicon verification teams for Interface IP technologies such as PCIe, CXL, DDR, and Ethernet.
  • Own execution, resource planning, and delivery from architecture through silicon validation and customer deployment.
  • Drive design and verification excellence through robust methodologies, quality standards, and coverage closure.
  • Partner across architecture, analog, physical design, firmware, and applications engineering to ensure successful product releases.
  • Develop technical talent and build leadership capability within the team.

What you'll need

  • BS/MS in Electrical Engineering, Computer Engineering, or related field.
  • 12+ years of related experience in ASIC design and verification.
  • Strong expertise in RTL design, SystemVerilog, UVM, and modern EDA development environments.
  • Experience delivering high-performance Interface IP products from concept through production.
  • Proven success building teams, driving execution, and making sound technical decisions in complex environments.
Market context

This role has been open 54 days — below the 62-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1021
Median days open
62 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How Synopsys compares in Digital/RTL Design hiring
Metric Synopsys All employers we track in this specialty (1021 roles · 103 employers)
Open roles in this specialty 85 1021
Open roles in the wider Digital Design & Verification family 168 3183 · 115 employers
Median days open 30 d 62 d (−32 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm · 140 open roles · median 62 d
  • Synopsys (this employer) · 85 open roles · median 30 d
  • AMD · 71 open roles · median 36 d
  • Analog Devices · 48 open roles · median 50 d
  • NVIDIA · 46 open roles · median 64 d
  • NXP Semiconductors · 41 open roles · median 85 d

How we counted: 1021 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Synopsys

Synopsys

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img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Austin, Texas, United States
On-site
2 months ago

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