Director, AI Systems – Scale-up, Scale-out and Networking - CA, San Jose, United States
Originally posted 28 July 2026 by the employer.
About the role
It focuses on UA Link, PCI Express (PCIe), CXL, Ethernet, and high-performance AI/HPC systems.
What you'll do
- Lead cross-functional engineering initiatives spanning silicon design, architecture, firmware, software, systems, validation, and product organizations.
- Provide technical and organizational leadership across multiple teams, guiding key architectural decisions, risk management, execution priorities, and long-term technology investments.
- Establish scalable validation and qualification strategies, ensuring readiness from pre-silicon development through system bring-up, production qualification, and customer deployment.
- Represent AMD in executive reviews, cross-functional technical forums, and strategic planning discussions.
What you'll need
- Extensive experience leading server, data center, AI, or HPC platform architecture, systems engineering, validation, or product development organizations.
- Deep understanding of modern connectivity and interconnect technologies including UA Link, PCIe Gen5/Gen6, CXL, Ethernet, high-speed SerDes, coherent fabrics, and large-scale distributed computing systems.
- Proven track record delivering complex products from architecture definition through silicon development, platform bring-up, qualification, customer enablement, and production launch.
- Experience collaborating across architecture, design, validation, firmware, software, manufacturing, and customer-facing organizations.
- Demonstrated success building, mentoring, and leading high-performing engineering teams.
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Nice to have
- Master's degree, PhD, or equivalent industry experience preferred.
Skills: AI infrastructure, scale-up/scale-out, PCIe, CXL, Ethernet
This role has been open 82 days — well above the 58-day median for Hardware Systems Engineering roles.
Hardware Systems Engineering · SOC Architecture
|
Open roles in category
103
|
Median days open
58 d
|
Median salary
$208k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (103 roles · 28 employers) |
|---|---|---|
| Open roles in this specialty | 28 | 103 |
| Open roles in the wider Software, Firmware & Systems family | 406 | 6118 · 145 employers |
| Median days open | 58 d | 58 d (same as this employer) |
| Median salary (USD postings) | — | $208k |
Skills observed across this category: AI infrastructure, scale-up/scale-out, PCIe, CXL, Ethernet
Who's hiring in this category
- AMD (this employer) · 28 open roles · median 58 d
- Qualcomm · 21 open roles · median 46 d
- NVIDIA · 16 open roles · median 77 d
- Intel Corporation · 6 open roles · median 45 d
- Mobileye · 4 open roles · median 25 d
- Apple · 3 open roles · median 17 d
How we counted: 103 open Hardware Systems Engineering (SOC Architecture) roles from 28 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.