Digital Physical Design Engineer
$96,150 - $160,250 USD yearly
Originally posted 3 November 2026 by the employer.
About the role
As a Digital Physical Design Engineer at Keysight Laboratories, you will handle module-level and SoC-level physical implementation from RTL to GDS for digital and mixed-signal ASICs. The work centers on the physical implementation and tape release of Digital/DSP and mixed-signal ASICs that power Keysight test and measurement hardware.
What you'll do
- Execute RTL to GDS implementation across module and SoC levels for digital and mixed-signal ASICs.
- Handle floorplanning, place and route, timing closure, static timing analysis (STA), formal verification, low-power design, clock distribution, EMIR analysis, and physical verification.
- Participate across full ASIC design activities including definition, architecture, digital logic design, IP validation, and synthesis.
- Close sign-off checks, interface directly with industry foundries, and deliver final GDS.
- Collaborate with cross-functional teams to inform architecture with physical design constraints, develop tool flows, and manage vendor milestones.
What you'll need
- Bachelor's or Master's degree in Electrical or Computer Engineering (typically 0–2 years of relevant experience).
- Electrical engineering fundamentals covering ASIC design, digital architectures/systems, and digital circuit synthesis.
- Experience in the verification of large and mixed-signal ASIC designs.
- Ability to identify, analyze, and debug complex design issues.
Nice to have
- Experience with Innovus and Tempus.
- Experience with task automation and scripting.
- Experience in digital and analog ASIC design flow, methodologies, and process.
- Experience with DFT architecture and implementation.
- Fluency in object-oriented programming.
Skills: RTL to GDS, floorplanning, place and route, STA, Innovus, timing closure
More semiconductor jobs: Keysight Technologies jobs · Physical design jobs
First seen in our index 10 days ago, well below the 62-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
753
|
Median days since first seen
62 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Keysight Technologies | All employers we track in this specialty (753 roles · 90 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 753 |
| Open roles in the wider Physical Implementation family | 48 | 1689 · 121 employers |
| Median days since first seen | 10 d | 62 d (+52 d vs this employer) |
| Median salary (USD postings) | n/a | $187k |
Skills observed across this category: RTL to GDS, floorplanning, place and route, STA, Innovus, timing closure
Who's hiring in this category
- Qualcomm · 119 open roles · median 66 d
- AMD · 66 open roles · median 45 d
- Broadcom · 53 open roles · median 24 d
- NVIDIA · 46 open roles · median 85 d
- Synopsys · 44 open roles · median 43 d
- Apple · 32 open roles · median 8 d
How we counted: 753 open Physical Design (Physical Design) roles from 90 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Physical Implementation family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.