Digital IP Design Engineer (f/m/d) - Munich, Germany
Originally posted 22 September 2026 by the employer.
Develop components for automotive microprocessors, application processors, micro-controllers, and networking products.
About the role
This role involves defining and developing digital IP components for a wide range of products. The Munich Digital IP team focuses on interface components, DSP subsystems, and RISC-V IPs.
What you'll do
- Develop and implement digital IP and logic designs for complex Mixed-Signal System-on-Chips (SoCs).
- Develop high-quality, area-optimal, low-power RTL design using Verilog/SystemVerilog.
- Complete design quality checks such as Lint, CDC/RDC using industry-standard tools.
- Conduct IP-level design verification activities, including basic testbench development, simulation, and debugging.
- Complete IP synthesis and basic timing analysis to meet timing, area, and power targets.
- Ensure IP design implementation adheres to design for testability (DFT) requirements.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
- Minimum 10 years of experience in IP or subsystem design.
- Solid understanding of microprocessor architecture, interconnects, and cache coherency mechanisms.
- Hands-on experience with CPU design (proprietary cores, RISC-V, or AI/ML accelerators).
- Experience with AMBA protocols (AHB, AXI, ACE, CHI) and memory systems (ROM, RAM, Flash, DDR/LPDDR).
- Advanced knowledge of Verilog, SystemVerilog, and C/C++.
- Proficiency in scripting languages such as Python, Perl, TCL, or Shell.
- Experience in debugging designs in both pre-silicon (simulation/emulation/FPGA) and post-silicon environments.
Nice to have
- Basic conversational German is a plus.
Skills: digital IP, logic designs, RTL design, Verilog/SystemVerilog, IP synthesis, DFT requirements
This role has been open 35 days — well below the 66-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1081
|
Median days open
66 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NXP Semiconductors | All employers we track in this specialty (1081 roles · 104 employers) |
|---|---|---|
| Open roles in this specialty | 45 | 1081 |
| Open roles in the wider Digital Design & Verification family | 138 | 3328 · 116 employers |
| Median days open | 96 d | 66 d (+30 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: digital IP, logic designs, RTL design, Verilog/SystemVerilog, IP synthesis, DFT requirements
Who's hiring in this category
- Qualcomm · 158 open roles · median 63 d
- Synopsys · 86 open roles · median 40 d
- AMD · 77 open roles · median 45 d
- Analog Devices · 49 open roles · median 56 d
- NXP Semiconductors (this employer) · 44 open roles · median 100 d
- NVIDIA · 37 open roles · median 52 d
How we counted: 1081 open Digital/RTL Design (RTL Design) roles from 104 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.