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NXP Semiconductors

Digital IP Design Engineer (f/m/d) - Munich, Germany

NXP Semiconductors Munich, Germany 13 days ago
Digital Design & SoC Architecture

Originally posted 22 September 2026 by the employer — open 0 days.

Develop components for automotive microprocessors, application processors, micro-controllers, and networking products.

About the role

This role involves defining and developing digital IP components for a wide range of products. The Munich Digital IP team focuses on interface components, DSP subsystems, and RISC-V IPs.

What you'll do

  • Develop and implement digital IP and logic designs for complex Mixed-Signal System-on-Chips (SoCs).
  • Develop high-quality, area-optimal, low-power RTL design using Verilog/SystemVerilog.
  • Complete design quality checks such as Lint, CDC/RDC using industry-standard tools.
  • Conduct IP-level design verification activities, including basic testbench development, simulation, and debugging.
  • Complete IP synthesis and basic timing analysis to meet timing, area, and power targets.
  • Ensure IP design implementation adheres to design for testability (DFT) requirements.

What you'll need

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
  • Minimum 10 years of experience in IP or subsystem design.
  • Solid understanding of microprocessor architecture, interconnects, and cache coherency mechanisms.
  • Hands-on experience with CPU design (proprietary cores, RISC-V, or AI/ML accelerators).
  • Experience with AMBA protocols (AHB, AXI, ACE, CHI) and memory systems (ROM, RAM, Flash, DDR/LPDDR).
  • Advanced knowledge of Verilog, SystemVerilog, and C/C++.
  • Proficiency in scripting languages such as Python, Perl, TCL, or Shell.
  • Experience in debugging designs in both pre-silicon (simulation/emulation/FPGA) and post-silicon environments.

Nice to have

  • Basic conversational German is a plus.

Skills: digital IP, logic designs, RTL design, Verilog/SystemVerilog, IP synthesis, DFT requirements

Market context

This role has been open 0 days — well below the 62-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
943
Median days open
62 d
Median salary
$184k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How NXP Semiconductors compares in Digital/RTL Design hiring
Metric NXP Semiconductors All employers we track in this specialty (943 roles · 101 employers)
Open roles in this specialty 53 943
Open roles in the wider Digital Design & Verification family 148 3066 · 114 employers
Median days open 68 d 62 d (+6 d vs this employer)
Median salary (USD postings) — $184k

Skills observed across this category: digital IP, logic designs, RTL design, Verilog/SystemVerilog, IP synthesis, DFT requirements

Who's hiring in this category

  • Qualcomm · 144 open roles · median 55 d
  • AMD · 62 open roles · median 63 d
  • Synopsys · 56 open roles · median 19 d
  • NXP Semiconductors (this employer) · 52 open roles · median 69 d
  • NVIDIA · 48 open roles · median 46 d
  • Analog Devices · 39 open roles · median 75 d

How we counted: 943 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 22 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Munich, Germany
On-site
13 days ago

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