Digital IC Design Intern, MS - Summer 2027
$35 - $70 USD yearly
Originally posted 21 September 2026 by the employer — open 0 days.
About the role
This role involves digital IC design and implementation for real chip design efforts within Marvell Technology.
What you'll do
- Develop and verify high-performance RTL design blocks.
- Apply digital design specifications for high-speed connectivity devices.
- Conduct synthesis, static timing analysis, timing signoff, and power analysis.
- Debug design issues and ensure functional correctness.
- Investigate and execute new design techniques and flows.
- Collaborate with architecture, design verification, and physical design teams.
What you'll need
- Currently enrolled in a Master’s Degree in Electrical Engineering, Computer Engineering, or a related field with an expected graduation date between Fall 2027 – Summer 2028.
- Completed courses focusing on circuit design, circuit theory, digital logic design, static timing analysis, computer architecture, Verilog, VLSI, digital signal processing (DSP), SoC/ASIC design, or electronics.
- Proficiency in programming and scripting languages like Python, Perl, Tcl.
- Experience using tools like Synopsys (Primetime), Cadence (Virtuoso & Spectre X), and Mentor.
- Hands-on experience with RTL design and a firm understanding of its integration into the overall ASIC design flow.
Skills: RTL design, ASIC design flow, synthesis, static timing analysis, Verilog
This role has been open 0 days — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
938
|
Median days open
62 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (938 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 938 |
| Open roles in the wider Digital Design & Verification family | 26 | 3030 · 114 employers |
| Median days open | 12 d | 62 d (−50 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: RTL design, ASIC design flow, synthesis, static timing analysis, Verilog
Who's hiring in this category
- Qualcomm · 143 open roles · median 54 d
- AMD · 61 open roles · median 62 d
- Synopsys · 57 open roles · median 30 d
- NXP Semiconductors · 51 open roles · median 68 d
- NVIDIA · 48 open roles · median 45 d
- Analog Devices · 39 open roles · median 74 d
How we counted: 938 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 21 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.