Digital Design Architect HPC IP - 18388
Originally posted 13 August 2026 by the employer.
Advance DDR, PCIe, UCIe, and Ethernet technologies in this HPC Interface IP role.
About the role
This role involves defining and developing ASIC RTL design and verification at both chip and block levels, focusing on high-speed IO protocols.
What you'll do
- Define and develop ASIC RTL design and verification at both chip and block levels.
- Create and execute design plans for complex digital designs, focusing on high-speed IO protocols including DDR, PCIe, CXL, UCIe, and Ethernet technologies.
- Collaborate with cross-functional teams to ensure seamless integration and functionality of designs.
- Utilize advanced design and verification methodologies and tools.
- Mentor engineers and promote best practices, technical excellence, and continuous improvement.
- Communicate with internal and external stakeholders to align goals and deliverables.
What you'll need
- BSEE/MSEE with extensive experience in ASIC RTL design.
- In-depth knowledge of DDR, PCIe, UCIe, and Ethernet technologies and similar IO protocols and their applications.
- Proficiency in advanced digital design tools and methodologies.
- Strong problem-solving skills.
- Excellent communication skills for effective collaboration with diverse teams.
This role has been open 61 days — exactly the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1024
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (1024 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 86 | 1024 |
| Open roles in the wider Digital Design & Verification family | 171 | 3198 · 115 employers |
| Median days open | 31 d | 61 d (−30 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 140 open roles · median 63 d
- Synopsys (this employer) · 86 open roles · median 31 d
- AMD · 71 open roles · median 37 d
- Analog Devices · 47 open roles · median 49 d
- NVIDIA · 44 open roles · median 59 d
- NXP Semiconductors · 42 open roles · median 85 d
How we counted: 1024 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.