DFT Engineering Director, CPU Cores Design for Testability
Originally posted 3 November 2026 by the employer.
About the role
This role leads Design for Testability (DFT) execution and roadmaps for future generations of AMD CPUs from concept through production. You will manage a multi-geography team within the high-performance CPU Cores development organization.
What you'll do
- Provide functional management for the DFT organization within the high-performance CPU Cores development team.
- Direct DFT feature development across domestic and international engineering sites.
- Support and execute DFT across multiple programs spanning multiple generations of the AMD CPU roadmap.
- Establish organizational priorities, operating mechanisms, and execution frameworks to enable program delivery.
- Drive workforce planning, succession planning, leadership development, and organizational growth across the team.
What you'll need
- BSEE or higher in Electrical Engineering or Computer Engineering.
- Experience in DFT architecture, design, debug, and verification, including engineering leadership.
- Technical knowledge of JTAG, ATPG, Scan, MBIST, and LBIST.
- Experience with pattern generation, deployment, and debug on ATE.
- Experience supporting DFT activities across concept-to-production development cycles.
- Working knowledge of Verilog or SystemVerilog, alongside scripting language experience.
Nice to have
- MSEE in Electrical or Computer Engineering.
- Experience with the x86 architecture.
- Knowledge of SystemC or C++.
- Familiarity with ICL/PDL.
- Experience integrating AI into the development environment.
More semiconductor jobs: AMD jobs · DFT engineer jobs · Texas jobs
This role has been open 0 days — well below the 57-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
254
|
Median days open
57 d
|
Category median salary (all employers)
$206k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (254 roles · 54 employers) |
|---|---|---|
| Open roles in this specialty | 36 | 254 |
| Open roles in the wider Digital Design & Verification family | 251 | 3428 · 114 employers |
| Median days open | 54 d | 57 d (−3 d vs this employer) |
| Median salary (USD postings) | — | $206k |
Who's hiring in this category
- AMD (this employer) · 36 open roles · median 54 d
- NVIDIA · 22 open roles · median 56 d
- Qualcomm · 22 open roles · median 82 d
- NXP Semiconductors · 19 open roles · median 47 d
- Synopsys · 18 open roles · median 34 d
- Intel Corporation · 9 open roles · median 63 d
How we counted: 254 open DFT Engineering (DFT Test) roles from 54 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.