DFT Engineer - Hyderabad-Sattva, India
Verification, Validation & Test
Originally posted 24 September 2026 by the employer.
About the role
This role involves the implementation and verification of Design for Testability (DFT) features and support for post-silicon bring-up activities.
What you'll do
- Implement and verify DFT features including SCAN, MBIST, LBIST, and JTAG.
- Support Spyglass-DFTDRC debug and coverage correlation.
- Perform Scan insertion and ATPG pattern generation.
- Verify ATPG patterns using gate-level simulation.
- Analyze test coverage and test cost reduction.
- Provide post-silicon support for successful bring-up and yield learning.
What you'll need
- Bachelors degree with 7+ years or Masters degree with 5+ years in Electronics engineering/Electrical Engineering.
- Experience in modern, digital design and DFT.
- Excellent communication skills and experience collaborating with engineers across different sites/timezones.
- Strong analytical and problem-solving skills.
Nice to have
- Experience in scan-stitching and knowledge of scan-stitching related concepts.
- Exposure to MBIST/BISR implementation and Tessent flow of mbist-insertion.
- Hands-on ATPG experience and familiarity with files required for ATPG.
- Knowledge/experience with Tessent ATPG (mentor).
- Knowledge on Spyglass-DFT.
- Hands-on debug skills and scripting skills.
- Knowledge on automation scripts like TCL/AWK/SED.
- Understanding of JTAG basics.
- Experience with post-silicon bring up.
Market context
This role has been open 0 days — well below the 62-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
225
|
Median days open
62 d
|
Median salary
$203k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (225 roles · 50 employers) |
|---|---|---|
| Open roles in this specialty | 41 | 225 |
| Open roles in the wider Digital Design & Verification family | 265 | 3097 · 114 employers |
| Median days open | 29 d | 62 d (−33 d vs this employer) |
| Median salary (USD postings) | — | $203k |
Who's hiring in this category
- AMD (this employer) · 39 open roles · median 29 d
- Qualcomm · 26 open roles · median 80 d
- NXP Semiconductors · 21 open roles · median 76 d
- NVIDIA · 18 open roles · median 72 d
- Micron Technology · 10 open roles · median 115 d
- Intel Corporation · 8 open roles · median 55 d
How we counted: 225 open DFT Engineering (DFT Test) roles from 50 employers tracked in the SemiconductorJobs index, counted 24 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.