Design Verification Senior Manager
About the role
Apple is seeking a Design Verification Senior Manager to own verification strategy and organizational execution across an analog mixed signal portfolio covering SerDes, DDR interfaces, PLLs, and data converters.
What you'll do
- Direct the DV organization by structuring teams, assigning responsibilities across the analog mixed signal portfolio, and adjusting as priorities shift.
- Set verification strategy and standards across the organization, incorporating AI-assisted test generation, coverage analysis, triage, and debug acceleration.
- Track verification results, schedule, and risk across all work streams, and escalate issues early and clearly.
- Communicate status, risk, resourcing needs, and strategic direction to upper management and cross-functional partners across circuits, digital design, firmware, and bring-up teams.
- Own hiring, retention, career development paths, and performance expectations while mentoring technical leads.
What you'll need
- BS in Electrical Engineering, Computer Engineering, or a related field with 20+ years of experience.
- Strong background in analog mixed signal verification.
- Experience with UVM-based methodology.
- Significant people-management experience at scale, including hiring, performance management, and managing multi-level organization structures.
Nice to have
- Proven ability to apply AI techniques to verification workflows, with experience building or scaling an AI-forward verification practice.
- Track record of communicating technical risk and strategy to executive stakeholders.
- Background spanning multiple IP domains and distributed or multi-site teams.
- MS or PhD in Electrical Engineering, Computer Engineering, or a related field.
Skills: UVM, SystemVerilog, AI-assisted test generation, coverage analysis, analog mixed signal
More semiconductor jobs: Apple jobs · Verification engineer jobs
This role has been open 0 days — well below the 58-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1293
|
Median days open
58 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (1293 roles · 99 employers) |
|---|---|---|
| Open roles in this specialty | 93 | 1293 |
| Open roles in the wider Digital Design & Verification family | 176 | 3447 · 120 employers |
| Median days open | 13 d | 58 d (−45 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: UVM, SystemVerilog, AI-assisted test generation, coverage analysis, analog mixed signal
Who's hiring in this category
- Qualcomm · 116 open roles · median 48 d
- NVIDIA · 104 open roles · median 70 d
- AMD · 86 open roles · median 64 d
- Apple (this employer) · 75 open roles · median 14 d
- Synopsys · 73 open roles · median 49 d
- SiFive · 60 open roles · median 62 d
How we counted: 1293 open Design Verification (Design Verification) roles from 99 employers tracked in the SemiconductorJobs index, counted 4 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.