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persimmons

Design Verification Engineer, New Grad (AI-Driven)

persimmons San Jose, California, United States Full-time 27 minutes ago
Verification, Validation & Test

About the role

As a Design Verification Engineer, New Grad (AI-Driven), you will run and refine the tools that check RTL designs against physical implementation.

What you'll do

  • Run daily RTL-to-physical-design verification checks using design tool suites to flag discrepancies early.
  • Leverage AI-powered tools for error detection, root-cause analysis, and iteration cycles across design checks.
  • Partner with senior RTL and physical design engineers to define and verify block-level specifications.
  • Build lightweight scripts and automations to improve the speed and reliability of design checks.
  • Investigate unfamiliar issues by combining documentation, team knowledge, and AI tooling.
  • Communicate findings and recommended next steps with design and verification teams.

What you'll need

  • Bachelor’s degree (or equivalent) in Electrical Engineering, Computer Engineering, Computer Science, Math, or a related technical field.
  • Exposure to digital logic design, computer architecture, or hardware description languages.
  • Working familiarity with SystemVerilog.
  • Comfort and curiosity using AI-assisted tools to work through technical problems.

Nice to have

  • Experience with Linux/bash environments and basic scripting.

Skills: SystemVerilog, RTL verification, digital logic, checks, scripting

More semiconductor jobs: Verification engineer jobs · San Jose jobs

Market context

This role has been open 0 days — well below the 57-day median for Design Verification roles.

Design Verification · Design Verification

Open roles in category
1317
Median days open
57 d
Category median salary (all employers)
$184k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How persimmons compares in Design Verification hiring
Metric persimmons All employers we track in this specialty (1317 roles · 99 employers)
Open roles in this specialty 2 1317
Open roles in the wider Digital Design & Verification family 3 3496 · 120 employers
Median days open 10 d 57 d (−47 d vs this employer)
Median salary (USD postings) — $184k

Skills observed across this category: SystemVerilog, RTL verification, digital logic, checks, scripting

Who's hiring in this category

  • Qualcomm · 117 open roles · median 49 d
  • NVIDIA · 104 open roles · median 71 d
  • Apple · 99 open roles · median 9 d
  • AMD · 83 open roles · median 65 d
  • Synopsys · 73 open roles · median 50 d
  • SiFive · 58 open roles · median 63 d

How we counted: 1317 open Design Verification (Design Verification) roles from 99 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
San Jose, California, United States
On-site
Full-time
27 minutes ago

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