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GlobalFoundries

Design Verification Engineer Intern (Summer 2027)

GlobalFoundries Richardson, Texas, United States of America, United States Internship 1 day ago
Verification, Validation & Test

$41,600 - $83,200 USD yearly

Originally posted 2 November 2026 by the employer.

About the role

MIPS – A GlobalFoundries company is seeking a Design Verification Engineer Intern to join the CPU verification team. The intern will verify processor components with a focus on CPU core functionality, performance, and modeling using advanced verification methodologies.

What you'll do

  • Perform functional verification of CPU cores and related subsystems.
  • Develop and execute verification plans, including testbench creation and test case development.
  • Write directed and constrained-random test cases in SystemVerilog, C, and Assembly.
  • Use UVM-based environments for coverage-driven verification.
  • Analyze coverage reports and support closure of functional and code coverage gaps.
  • Automate regression and verification flows using Python, Perl, or Shell.

What you'll need

  • Active enrollment in an accredited Bachelor’s program in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related field (at least sophomore standing) with a minimum 3.0 GPA.
  • Coursework or project experience with SystemVerilog, UVM, or constrained-random verification.
  • Familiarity with CPU architectures such as RISC-V, ARM, or MIPS.
  • Basic understanding of cache and coherency concepts.
  • Scripting experience in Python, Perl, or Shell.
  • Ability to work at least 40 hours per week during the internship.

Nice to have

  • Prior related internship or co-op experience.
  • Exposure to RISC-V architecture.
  • Knowledge of interconnect protocols such as AXI, ACE, or CHI.
  • Experience with FPGA prototyping or emulation platforms.

Skills: UVM, SystemVerilog, functional verification, CPU cores, coverage-driven verification

More semiconductor jobs: GlobalFoundries jobs · Verification engineer jobs · Richardson jobs

Market context

This role has been open 0 days — well below the 59-day median for Design Verification roles.

Design Verification · Design Verification

Open roles in category
1278
Median days open
59 d
Category median salary (all employers)
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How GlobalFoundries compares in Design Verification hiring
Metric GlobalFoundries All employers we track in this specialty (1278 roles · 96 employers)
Open roles in this specialty 9 1278
Open roles in the wider Digital Design & Verification family 41 3402 · 114 employers
Median days open 27 d 59 d (−32 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: UVM, SystemVerilog, functional verification, CPU cores, coverage-driven verification

Who's hiring in this category

  • Qualcomm · 114 open roles · median 47 d
  • NVIDIA · 97 open roles · median 75 d
  • AMD · 85 open roles · median 61 d
  • Apple · 75 open roles · median 13 d
  • Synopsys · 73 open roles · median 48 d
  • SiFive · 60 open roles · median 61 d

How we counted: 1278 open Design Verification (Design Verification) roles from 96 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Richardson, Texas, United States of America, United States
On-site
Internship
$41,600 - $83,200 USD yearly
1 day ago

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