Design Verification Engineer
$120,000 - $192,000 USD yearly
Originally posted 11 May 2026 by the employer. Relisted by the employer on 23 October 2026.
About the role
Broadcom's ASIC Product Division is seeking a Design Verification Engineer to work on SoC and IP development programs for subsystem designs.
What you'll do
- Build and maintain verification environments using System Verilog and UVM.
- Design verification components including UVM agents and behavioral models.
- Implement functional coverage and assertions using System Verilog.
- Develop random and directed test cases against design specifications.
- Analyze and debug simulation failures and evaluate coverage results.
What you'll need
- Bachelor's Degree in Electrical and Electronic Engineering, Computer Science, or equivalent.
- 8+ years of relevant industry work experience in system-level and block-level verification.
- Fluent knowledge of RTL verification methodologies including System Verilog.
- Strong experience in ASIC design verification flows, DV methodologies, and object-oriented verification languages such as UVM and OVM.
- Proficiency in C/C++, Perl, and scripting.
- Independent design debugging capability and experience analyzing verification trade-off scenarios.
- Legal authorization to work in the US.
Nice to have
- Experience with hardware design and debug, C++, SystemC, and other programming languages.
- Experience working with emulators and FPGA-based prototyping.
- Familiarity with overall chip design methodologies and tools.
- Knowledge of CPU, DDR, Bus Protocol, Network Protocol, or DSP design.
Skills: L2/L3 Network Switching, ASIC verification, test plans, SystemVerilog, functional coverage, code coverage
More semiconductor jobs: Broadcom jobs · Verification engineer jobs
This role has been open 196 days — well above the 59-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1278
|
Median days open
59 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (1278 roles · 96 employers) |
|---|---|---|
| Open roles in this specialty | 20 | 1278 |
| Open roles in the wider Digital Design & Verification family | 67 | 3433 · 114 employers |
| Median days open | 42 d | 59 d (−17 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: L2/L3 Network Switching, ASIC verification, test plans, SystemVerilog, functional coverage, code coverage
Who's hiring in this category
- Qualcomm · 114 open roles · median 47 d
- NVIDIA · 97 open roles · median 75 d
- AMD · 85 open roles · median 61 d
- Apple · 75 open roles · median 13 d
- Synopsys · 73 open roles · median 48 d
- SiFive · 60 open roles · median 61 d
How we counted: 1278 open Design Verification (Design Verification) roles from 96 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.