Design Engineer -Memory Layout - Noida, India
Originally posted 4 August 2026 by the employer.
About the role
This role involves memory layout design within the PHYSICAL IP – MEMORY group.
What you'll do
- Implement quality full-custom layouts of high-performance arrays and memory blocks from supplied schematics.
- Interpret and implement all physical design rules in advanced manufacturing processes.
- Custom layout and verification of complex memory cells.
- Perform physical design verification (DRC/LVS/DFM) for circuit and test layouts.
- Conduct Electro-migration and IR checks for reliability and integrity.
What you'll need
- 2+ years relevant layout design experience.
- Ability to understand, plan, and organize work using complex schematics of hierarchically structured circuits.
- Understanding of layout techniques for optimization of power, speed, and area for data path, bitcell arrays, word line drivers, control blocks, and other complex memory circuits.
- Ability to quickly interpret and repair complicated LVS and DRC problems using innovative verification software.
- Experience with Cadence Virtuoso layout systems.
Nice to have
- Understanding of layout techniques for design-for-manufacture in advanced (7nm/5nm/3nm/2nm) processes.
- Ability to identify possible design tradeoffs with circuit design leads, based upon assumptions, inherent knowledge, and design analysis.
- Programming experience Tcl, Perl, shell, Skill, Scheme.
Skills: full-custom layouts, memory blocks, DRC/LVS/DFM, Cadence Virtuoso, bitcell arrays
This role has been open 62 days — below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arm Holdings | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 287 |
| Median days open | 62 d | 69 d (−7 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: full-custom layouts, memory blocks, DRC/LVS/DFM, Cadence Virtuoso, bitcell arrays
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.