Design Engineer II
$101,500 - $188,500 USD yearly
Originally posted 5 November 2026 by the employer.
About the role
As a Design Engineer II at Silicon Labs, you will develop highly integrated, low power, System on a Chip devices to serve the IoT wireless market.
What you'll do
- Develop complex SoC and chip architectures featuring multiple processors, digital and mixed-signal subsystems, multiple power domains, and multiple clock domains to optimize power for customer scenarios.
- Implement RTL design of modules through System Verilog HDL coding while adhering to quality standards.
- Manage SoC-level configuration and integration of digital and mixed-signal IPs, including embedded processors, memory controllers, buses, power/clocking systems, security systems, machine learning, radio systems, and analog IP.
- Perform logic synthesis, full chip timing, and power analysis to optimize designs for power, performance, and area in collaboration with the backend team.
- Execute pre-silicon verification using block-level and chip-level test benches, and support post-silicon validation and bring-up across functional teams.
- Conduct architecture, design, and verification reviews throughout the project lifecycle.
What you'll need
- Master’s degree in Electrical Engineering.
- 3-5 years of professional experience in digital CMOS IC design.
- Verilog RTL design experience with a track record of taking designs through the silicon development lifecycle to production.
- Knowledge of embedded processor systems and C coding.
- Experience with logic simulators for both RTL and gate-level simulation, design/waveform browsers, and power analysis tools.
- Experience with logic synthesis and timing constraints, as well as integrating and verifying analog and mixed signal designs in SoC environments.
- Experience with scripting and automation using Python, Perl, and Tcl.
- Experience with revision control and configuration management systems such as Perforce, Git, or Methodics.
- Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making.
Skills: SystemVerilog, RTL, SoC, Synthesis, CMOS
More semiconductor jobs: RTL design jobs
This role has been open 0 days — well below the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1086
|
Median days open
61 d
|
Category median salary (all employers)
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Silicon Labs | All employers we track in this specialty (1086 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 11 | 1086 |
| Open roles in the wider Digital Design & Verification family | 19 | 3472 · 119 employers |
| Median days open | 56 d | 61 d (−5 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: SystemVerilog, RTL, SoC, Synthesis, CMOS
Who's hiring in this category
- Qualcomm · 142 open roles · median 71 d
- Synopsys · 90 open roles · median 48 d
- AMD · 78 open roles · median 47 d
- NXP Semiconductors · 45 open roles · median 104 d
- NVIDIA · 44 open roles · median 61 d
- Analog Devices · 41 open roles · median 51 d
How we counted: 1086 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.