DDRSS Systems Engineer

Originally posted 7 October 2026 by the employer.

About the role

The DDRSS Systems Engineer is responsible for validating, tuning, and optimizing the DDR subsystem across pre-silicon and post-silicon platforms. This role requires close collaboration with design, validation, architecture, and software teams to ensure critical power, performance, reliability, and functionality features are successfully enabled in Qualcomm products.

What you'll do

• Develop and maintain low-level firmware and system APIs for DDR subsystem initialization, training, power management, and performance features.
• Validate firmware functionality in simulation, emulation, FPGA, and silicon environments.
• Analyze and debug system issues spanning hardware, firmware, and software domains.
• Collect and interpret stability, performance, power, and reliability data to guide design and product decisions.
• Collaborate across design, DV, software, architecture, and product teams to enable and optimize DDR features.
• Perform DDR subsystem bring-up and characterization on pre-silicon and post-silicon platforms.
• Debug memory subsystem issues involving LPDDR interfaces, caches, interconnects, and memory controllers.

What you'll need

• 2 years of experience in embedded firmware or low-level software development.
• Strong programming skills in C.
• Experience with embedded system debugging and hardware/software integration.
• Understanding of digital design fundamentals and computer architecture concepts.
• Experience using lab equipment and silicon debugging tools to collect and analyze system data.
• Familiarity with LPDDR memory interface concepts and protocol fundamentals.

Nice to have

• Experience with LPDDR4/LPDDR5/LPDDR5X memory protocols, training algorithms, timing parameters, and power management features.
• Experience with DDR subsystem validation, characterization, and post-silicon bring-up.
• Experience debugging and collecting data from silicon platforms.
• Experience developing or maintaining Verilog/SystemVerilog simulation testbenches and validation environments.
• Familiarity with memory controllers, caches, coherent interconnects, and SoC architecture.
• Experience in performance analysis, power optimization, or system tuning activities.
• Familiarity with emulation platforms and FPGA prototyping environments.
• Experience with Python, scripting, or automation used for validation and data analysis.

Skills: DDR subsystem firmware, low-level software, embedded systems, LPDDR protocols, silicon bring-up