Validate and debug server memory subsystems spanning UMC, DRAM, firmware, and BIOS.
Originally posted 12 November 2026 by the employer.
About the role
The DDR Functional Validation Engineer is responsible for end-to-end enablement, functional validation, and debug of the server memory subsystem, spanning UMC, DRAM, firmware, BIOS, platform, and system-level interactions. The role drives new DDR features from initial enablement through production readiness by developing validation strategies, test content, and executing across server hardware configurations.
What you'll do
- Develop and execute DDR functional validation plans, test content, execution matrices, and pass/fail criteria for memory-controller and memory-subsystem capabilities.
- Validate DDR features across operating speeds, memory configurations, BIOS/FW revisions, and server platforms.
- Exercise individual features and validate complex interactions with power management, RAS, training, and refresh behaviors.
- Analyze validation failures and isolate root causes across silicon/RTL, UMC, firmware, BIOS, DRAM, and platform boundaries using register data, logs, and traces.
- File and drive silicon and firmware defects to resolution with architecture, design, firmware, and platform engineering teams.
- Validate hardware workarounds and fixes, expanding regression test suites to close coverage gaps.
What you'll need
- Experience in post-silicon functional validation or silicon debug focused on DDR memory subsystems or memory controllers.
- Hands-on experience debugging issues across silicon/RTL, UMC, firmware, BIOS, and DRAM interfaces.
- Demonstrated ability to translate architectural and design specifications into validation plans, test content, and execution matrices.
- Experience testing memory interactions with system-level behaviors including training, power management, refresh, and RAS.
Skills: DDR, functional validation, memory controller, silicon debug, BIOS
More semiconductor jobs: AMD jobs · Silicon validation jobs · Texas jobs
First seen in our index 0 days ago, well below the 42-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
461
|
Median days since first seen
42 d
|
Category median salary (all employers)
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (461 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 66 | 461 |
| Open roles in the wider Silicon Validation & Test family | 152 | 2429 · 120 employers |
| Median days since first seen | 38 d | 42 d (+4 d vs this employer) |
| Median salary (USD postings) | n/a | $167k |
Skills observed across this category: DDR, functional validation, memory controller, silicon debug, BIOS
Who's hiring in this category
- AMD (this employer) · 61 open roles · median 43 d
- Qualcomm · 43 open roles · median 40 d
- Micron Technology · 30 open roles · median 49 d
- Apple · 27 open roles · median 20 d
- NVIDIA · 27 open roles · median 42 d
- Microchip Technology · 22 open roles · median 89 d
How we counted: 461 open Post-Silicon Validation (Silicon Validation) roles from 67 employers tracked in the SemiconductorJobs index, counted 12 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Silicon Validation & Test family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.