CPU Front-end Design Manager - Bangalore, India
Originally posted 22 September 2026 by the employer — open 0 days.
Drive the Memory Execution Unit (MEU) Front-End development for Server and Client products.
About the role
This role involves leading the Memory Execution Unit (MEU) Front-End development team, responsible for delivering CPU microarchitecture solutions. You will own end-to-end execution of the MEU cluster across RTL Design, Design Verification, and Formal Verification.
What you'll do
- Own end-to-end delivery of the MEU cluster across RTL, DV, and Formal Verification functions.
- Drive microarchitecture reviews, implementation strategy, verification closure, and quality signoff.
- Ensure delivery of features meeting Power, Performance, Area (PPA), Quality, Reliability, and Security objectives.
- Define execution strategy, milestones, risk mitigation plans, and resource allocation.
- Drive adoption of advanced methodologies, automation, AI-assisted debug, formal technologies, and verification innovations.
- Partner with Architecture, Design, Validation, Physical Design, DFT, Power, Security, and Product Engineering teams.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 15+ years of industry experience, or Master's degree with 12+ years of experience.
- 5+ years of engineering management experience leading senior technical teams.
- Strong expertise in CPU microarchitecture, RTL design, verification methodologies, and formal verification.
- Proven experience delivering complex SoC/CPU products from definition through silicon.
- Deep understanding of SystemVerilog, verification methodologies, assertions, coverage-driven verification, and formal tools.
- Demonstrated success leading cross-functional programs and geographically distributed teams.
Nice to have
- Experience leading large Front-End CPU organizations spanning RTL, DV, and Formal Verification.
- Expertise in Out-of-Order CPUs, Memory Subsystems, Cache Coherency, or Execution Units.
- Strong understanding of performance, power, security, and quality tradeoffs.
- Experience driving AI/ML-based validation methodologies and automation initiatives.
Skills: CPU microarchitecture, RTL Design, Design Verification, Formal Verification, SystemVerilog
This role has been open 0 days — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
943
|
Median days open
62 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (943 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 16 | 943 |
| Open roles in the wider Digital Design & Verification family | 62 | 3066 · 114 employers |
| Median days open | 81 d | 62 d (+19 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: CPU microarchitecture, RTL Design, Design Verification, Formal Verification, SystemVerilog
Who's hiring in this category
- Qualcomm · 144 open roles · median 55 d
- AMD · 62 open roles · median 63 d
- Synopsys · 56 open roles · median 19 d
- NXP Semiconductors · 52 open roles · median 69 d
- NVIDIA · 48 open roles · median 46 d
- Analog Devices · 39 open roles · median 75 d
How we counted: 943 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 22 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.