CPU Architecture Verification Engineer
About the role
This role involves driving architectural verification to ensure the CPU's behavior and architectural state align with specifications and a golden reference model.
What you'll do
- Drive the verification scope, strategy, and test plans for architectural correctness.
- Build, maintain, and scale robust verification environments, including co-simulation against a golden reference model.
- Generate stimulus in assembly and random instruction sequences (RIS) to exercise the full instruction set and architectural corner cases.
- Define the coverage space, write functional coverage monitors, and analyze metrics for architectural test plan completion.
- Partner with architects and RTL teams to root-cause mismatches and support emulation, FPGA, and silicon bring-up.
What you'll need
- 15+ years of design-verification experience, ideally on a CPU or complex digital design.
- Strong knowledge of CPU architecture and micro-architecture, including instruction set, architectural state, exceptions, and privilege model, with understanding of at least one modern ISA (x86, ARM, or RISC-V).
- Hands-on functional verification: test plans, testbenches, checkers, and coverage.
- Proficiency in C/C++/Rust and/or SystemVerilog, plus a scripting language (Python; Perl).
- Experience writing and debugging tests in assembly for CPU verification.
- Architectural / instruction-set verification against a golden reference model.
- Random instruction sequence (RIS) stimulus generation.
- Exceptions, interrupts, privilege levels, and virtualization.
- Constrained-random verification and coverage-driven closure.
- Assertions and formal verification.
- Emulation/FPGA and silicon bring-up and debug (waveforms, trace).
Skills: CPU architecture, architectural verification, golden reference model, functional verification, RISC-V
This role has been open 2 days — well below the 57-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1138
|
Median days open
57 d
|
Median salary
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Nuvacore | All employers we track in this specialty (1138 roles · 92 employers) |
|---|---|---|
| Open roles in this specialty | 12 | 1138 |
| Open roles in the wider Digital Design & Verification family | 17 | 3022 · 114 employers |
| Median days open | 2 d | 57 d (−55 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: CPU architecture, architectural verification, golden reference model, functional verification, RISC-V
Who's hiring in this category
- Qualcomm · 107 open roles · median 51 d
- AMD · 98 open roles · median 33 d
- NVIDIA · 90 open roles · median 66 d
- Micron Technology · 56 open roles · median 97 d
- Synopsys · 56 open roles · median 24 d
- SiFive · 51 open roles · median 45 d
How we counted: 1138 open Design Verification (Design Verification) roles from 92 employers tracked in the SemiconductorJobs index, counted 18 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.