Circuit / Memory Design Engineer | HBM - TPG - Richardson, TX, United States
Originally posted 15 June 2026 by the employer.
Develop High Bandwidth Memory (HBM) solutions for AI and ML applications using Through Silicon Via (TSV) technology.
About the role
As a Design Engineer, you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. This role focuses on developing High Bandwidth Memory (HBM) solutions for AI and ML applications.
What you'll do
- Contribute to new product opportunities by supporting overall circuit design, layout, and optimization for memory and logic or analog circuits.
- Perform parasitic modeling and support design validation, including reticle experiments and required tape-out revisions.
- Oversee and manage the layout process, including floor-planning, placement, and routing.
- Perform verification using modeling, simulation, and AI assisted analysis with industry-standard simulators.
- Collaborate across teams to drive standardization and shared design success.
- Partner with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering to support accurate manufacturability.
- Proactively incorporate guidance from standards, computer-aided design (CAD), modeling, and verification teams to improve design quality.
What you'll need
- Bachelor’s degree in Electrical Engineering or a related field, or equivalent practical experience.
- 4+ years of relevant experience with a Bachelor’s degree, or 2+ years with a Master’s degree.
- Extensive knowledge of CMOS circuit design and semiconductor device physics.
- Experience with schematic entry, Verilog, FastSPICE, and HSPICE simulations.
- Strong understanding of timing, area, power, and complexity trade-offs in DRAM or mixed-signal design.
Nice to have
- Scripting experience (Python, TCL, Perl).
- Prior register-transfer level (RTL) design flow experience in DRAM or foundry processes.
- Experience with design for test (DFT) concepts or implementation at any level.
Skills: memory circuit design, layout, parasitic modeling, NAND, DRAM, HSPICE
This role has been open 150 days — well above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: memory circuit design, layout, parasitic modeling, NAND, DRAM, HSPICE
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.