Associate Staff Verification Engineer - Wireless - Austin, United States
$126,000 - $234,000 USD yearly
Originally posted 11 August 2026 by the employer.
About the role
This role involves radio datapath verification for wireless protocols at the subsystem and SoC level.
What you'll do
- Develop testbench for wireless data packet Tx/Rx, MAC-Radio interface, MAC-HOST interface, Low Power Modes, Security Interfaces with UVM and C
- Develop Verification Plan, Coverage, Formal Vs Functional Strategies
- Work and Develop with Real Number Models for Rf / Analog modelling
- Use MATLAB models for Rf/Modem integrity checks
- Work with latest EDA and AI platforms to develop automation in radio/mac/host/power architecture verification
What you'll need
- Bachelor's or master's degree in electrical and/or Computer Engineering
- 3-8 years of experience
- Industry experience developing testbenches with SV-UVM and C
- Scripting / Automation experience
- Design/Verification skills
- Software/Firmware coding (C)
- UVM, System Verilog Assertion and coverage analysis
- Low-power implementation (UPF)
- Real Number Modeling (RNM, Spice)
Nice to have
- Wireless Communication protocols – BLE/WIFI/Zigbee
- Knowledge of Mixed Signal Real Number Modeling
- UPF based low power verification
Skills: Radio Datapath Verification, SV-UVM, Verification Plan, Real Number Models, UPF based low power verification
This role has been open 67 days — slightly above the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1205
|
Median days open
64 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Silicon Labs | All employers we track in this specialty (1205 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 1205 |
| Open roles in the wider Digital Design & Verification family | 19 | 3202 · 115 employers |
| Median days open | 43 d | 64 d (−21 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: Radio Datapath Verification, SV-UVM, Verification Plan, Real Number Models, UPF based low power verification
Who's hiring in this category
- Qualcomm · 110 open roles · median 38 d
- AMD · 96 open roles · median 51 d
- NVIDIA · 86 open roles · median 58 d
- Synopsys · 64 open roles · median 32 d
- SiFive · 55 open roles · median 74 d
- Cadence Design Systems · 50 open roles · median 116 d
How we counted: 1205 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.