ASICS Engineer
$101,400 - $152,200 USD yearly
Originally posted 15 October 2026 by the employer.
About the role
As an ASICS Engineer, you will define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.
What you'll do
- Apply ASIC knowledge to assist in defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting of IP (block/SoC) development.
- Assist in the creation of architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
- Collaborate with team members to assist in the development of an implementation strategy that meets system requirements.
- Support the evaluation of process flow from high-level design to synthesis, place and route, timing and power use, and verification.
- Utilize tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable architecture and design of a specific part of a block/SoC or IC Package.
- Write technical documentation for EDA/IP/ASIC projects.
What you'll need
- Bachelor's degree in Science, Engineering, or related field.
Nice to have
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
- 6 months of experience with architecture and design tools.
- 6 months of experience with scripting tools and programming languages.
- 6 months of experience with design verification methods.
Skills: ASIC, RTL, IP development, architecture, logic designs, synthesis
This role has been open 0 days — well below the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1021
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1021 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 140 | 1021 |
| Open roles in the wider Digital Design & Verification family | 380 | 3183 · 115 employers |
| Median days open | 61 d | 61 d (same as this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: ASIC, RTL, IP development, architecture, logic designs, synthesis
Who's hiring in this category
- Qualcomm (this employer) · 134 open roles · median 64 d
- Synopsys · 86 open roles · median 29 d
- AMD · 72 open roles · median 35 d
- Analog Devices · 49 open roles · median 47 d
- NVIDIA · 46 open roles · median 63 d
- NXP Semiconductors · 41 open roles · median 84 d
How we counted: 1021 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.
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