$100,000 - $189,750 USD yearly
Verify the design and implementation of SoCs and GPUs.
Originally posted 28 September 2026 by the employer.
About the role
As an ASIC Verification Engineer, you will verify the design and implementation of SoCs and GPUs. This position offers the opportunity to impact product lines by verifying memory subsystem units and hardware/firmware interactions.
What you'll do
- Verify design, architecture, and micro-architecture using advanced verification methodologies.
- Define verification scope and contribute to the development of verification infrastructure for memory subsystem units.
- Verify firmware code, focusing on hardware/firmware interactions.
- Collaborate with architects, designers, and software engineers to achieve verification goals.
What you'll need
- Pursuing or recently completed a BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- Knowledge in verification methodology and creating reusable verification components.
- Knowledgeable in verification using random stimulus, functional coverage, and assertion-based verification methodologies.
- Proficiency in Object Oriented Programming with SystemVerilog.
- Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB), and methodologies (UVM or equivalent).
- Passion for debugging and strong problem-solving skills.
Skills: SystemVerilog, UVM, functional coverage, assertion-based verification, VCS
More semiconductor jobs: NVIDIA jobs · Verification engineer jobs
First seen in our index 45 days ago, well below the 59-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1412
|
Median days since first seen
59 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1412 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 109 | 1412 |
| Open roles in the wider Digital Design & Verification family | 290 | 3617 · 122 employers |
| Median days since first seen | 73 d | 59 d (−14 d vs this employer) |
| Median salary (USD postings) | n/a | $185k |
Skills observed across this category: SystemVerilog, UVM, functional coverage, assertion-based verification, VCS
Who's hiring in this category
- Qualcomm · 138 open roles · median 52 d
- NVIDIA (this employer) · 109 open roles · median 74 d
- Apple · 107 open roles · median 17 d
- Synopsys · 90 open roles · median 53 d
- AMD · 81 open roles · median 65 d
- SiFive · 57 open roles · median 72 d
How we counted: 1412 open Design Verification (Design Verification) roles from 101 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.