RTL SoC and subsystem verification for ARM-based SoCs using UVM, Portable Stimulus, and formal verification flows.
Originally posted 13 May 2026 by the employer.
About the role
This role is responsible for RTL SoC and subsystem verification of ARM-based SoCs using UVM, Portable Stimulus, and formal verification flows. You will report directly to the Director of Engineering (Verification).
What you'll do
- Define test plans, develop micro-architecture design verification, and execute RTL verification.
- Perform top-level, block-level functional, performance, and system-level use-case verification.
- Support test program development, chip validation, and silicon life cycle activities through production maturity.
- Collaborate across firmware, software, DV, FPGA, DFT, SoC integration, and backend teams throughout ASIC development.
What you'll need
- 8+ years of experience in UVM verification and UVM environment development.
- Proficiency in test plan definition and testcase development in C, Assembly, or SystemVerilog.
- Expertise in verifying designs at the RTL level and gate-level simulation.
- Experience with coverage analysis, performance verification, and use-case verification.
- Working experience with AMBA AXI, AHB, and APB protocols.
- Experience verifying interface protocols such as PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, or UART.
- Experience in functional test vector development and post-silicon bring-up/debug.
- Fluency with scripting languages such as Perl, Python, or Shell.
- Experience with repository management tools like Bitbucket/Jenkins and bug tracking tools like JIRA.
- BE/BTech or ME/MTech degree in EE, EECS, CS, or equivalent.
Skills: UVM, SystemVerilog, RTL verification, coverage analysis, AMBA AXI
More semiconductor jobs: Verification engineer jobs
First seen in our index 0 days ago, well below the 62-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1339
|
Median days since first seen
62 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Axiado | All employers we track in this specialty (1339 roles · 99 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 1339 |
| Open roles in the wider Digital Design & Verification family | 18 | 3546 · 121 employers |
| Median days since first seen | 0 d | 62 d (+62 d vs this employer) |
| Median salary (USD postings) | n/a | $185k |
Skills observed across this category: UVM, SystemVerilog, RTL verification, coverage analysis, AMBA AXI
Who's hiring in this category
- Qualcomm · 120 open roles · median 51 d
- Apple · 108 open roles · median 15 d
- NVIDIA · 108 open roles · median 74 d
- AMD · 79 open roles · median 70 d
- Synopsys · 73 open roles · median 56 d
- SiFive · 57 open roles · median 70 d
How we counted: 1339 open Design Verification (Design Verification) roles from 99 employers tracked in the SemiconductorJobs index, counted 12 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.