ASIC Technical Program Manager - San Jose, United States
Originally posted 1 May 2026 by the employer.
About the role
The ASIC Technical Program Manager will own program coordination across Physical Design, DFT, DV, and RTL teams while managing relationships with external vendors including IP providers, implementation partners, and EDA tool vendors.
What you'll do
- Own program management and cross-functional technical coordination across Physical Design, DFT, DV, RTL, and Post-Silicon teams, tracking inter-team dependencies, handoffs, and sign-offs. - Engage directly with external vendors, including EDA partners and implementation partners, holding them accountable to timelines and deliverables. - Proactively identify critical path risks, schedule slippage, and cross-team blockers, partnering with engineering leads to develop mitigation strategies. - Manage scheduling and execution across tape-out milestones, synthesis respins, ECO cycles, and signoff cycles. - Provide regular status updates to engineering leads, VP-level stakeholders, and executive leadership, facilitating alignment and driving decisions. - Work with ops and engineering teams to track program state, action owners, and open items while supporting engineering visibility tooling.
What you'll need
- At least one full ASIC tape-out completed end-to-end. - Solid understanding of the RTL-to-GDSII flow, including handoffs between Physical Design, DFT, DV, and RTL teams. - 5+ years of experience in technical program management, engineering program management, or a closely related role within semiconductors or hardware. - Experience working directly with external EDA vendors or implementation partners. - Bachelor’s degree in Engineering, Computer Science, or a related field.
Skills: ASIC tape-out, RTL-to-GDSII flow, Physical Design, DFT, DV
This role has been open 177 days — well above the 51-day median for Technical Program Management roles.
Technical Program Management · SOC Architecture
|
Open roles in category
177
|
Median days open
51 d
|
Median salary
$220k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Etched | All employers we track in this specialty (177 roles · 48 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 177 |
| Median days open | 177 d | 51 d (+126 d vs this employer) |
| Median salary (USD postings) | — | $220k |
Skills observed across this category: ASIC tape-out, RTL-to-GDSII flow, Physical Design, DFT, DV
Who's hiring in this category
- Qualcomm · 25 open roles · median 54 d
- AMD · 21 open roles · median 29 d
- NVIDIA · 20 open roles · median 40 d
- Synopsys · 15 open roles · median 44 d
- Arm Holdings · 10 open roles · median 91 d
- NXP Semiconductors · 7 open roles · median 34 d
How we counted: 177 open Technical Program Management (SOC Architecture) roles from 48 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.