$121,900 USD yearly
Focus on solving testability challenges and DFT implementation in 3nm and beyond processes.
Originally posted 9 November 2026 by the employer.
About the role
This role is for an ASIC DFT Engineer in Broadcom's ASIC Product Division, participating in SoC DFT implementation, verification, debug activities, and post-silicon bring-up. The position focuses on solving testability challenges in 3nm and beyond process technologies.
What you'll do
- Define DFT specifications for ASICs based on feature requirements and DPPM goals.
- Implement DFT structures, including Scan, MBIST, TAP, LBIST, IO, SerDes, and other IP DFT integration.
- Collaborate with STA and design integration engineers on design closure for test.
- Generate, verify, and debug test vectors prior to tape release, and validate test vectors on ATE during silicon bring-up.
- Assist with silicon failure analysis, diagnostics, yield improvement, and debugging customer returned parts on ATE.
- Automate DFT and test vector generation flows using TCL, Perl, Python, C++, or Verilog.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with 10+ years of experience.
- Strong DFT background in Scan Insertion and scan compression tools such as DFT Compiler or Mentor TestKompress.
- Experience with ATPG vector generation, simulation, and debug using tools such as TetraMax or Fastscan.
- Experience in Logic BIST design and debug, along with Memory BIST insertion and verification for SRAM, CAM, or eDRAM.
- Experience in Verilog coding, testbench generation, simulation, and scripting in TCL, Perl, Python, or C++.
- Working knowledge of analog and digital circuit design, device physics fundamentals, logical and physical synthesis, and transistor reliability principles.
Nice to have
- Experience working on ATE.
More semiconductor jobs: Broadcom jobs · DFT engineer jobs
This role has been open 0 days — well below the 55-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
293
|
Median days open
55 d
|
Category median salary (all employers)
$206k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (293 roles · 55 employers) |
|---|---|---|
| Open roles in this specialty | 29 | 293 |
| Open roles in the wider Digital Design & Verification family | 78 | 3526 · 120 employers |
| Median days open | 6 d | 55 d (−49 d vs this employer) |
| Median salary (USD postings) | — | $206k |
Who's hiring in this category
- AMD · 43 open roles · median 47 d
- Broadcom (this employer) · 26 open roles · median 6 d
- NVIDIA · 23 open roles · median 58 d
- Qualcomm · 23 open roles · median 82 d
- NXP Semiconductors · 19 open roles · median 63 d
- Synopsys · 19 open roles · median 33 d
How we counted: 293 open DFT Engineering (DFT Test) roles from 55 employers tracked in the SemiconductorJobs index, counted 9 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.