$30 - $41 USD hourly
Originally posted 19 October 2026 by the employer.
About the role
STMicroelectronics is seeking an ASIC Design Verification Intern to join the team in-person at the office in Coppell, TX. This role focuses on Analog IP pre- and post-layout verification, behavioral modeling, and simulation.
What you'll do
- Manage Analog IP pre- and post-layout verification, simulation, specification, and documentation.
- Create behavioral models.
- Write test benches for block and system verification.
- Contribute to bench data collection of various Analog blocks.
- Generate and maintain design documentation.
What you'll need
- Currently working towards a BS or MS in Electrical Engineering or a related field (or Computer Science with an electrical/hardware/analog engineering background).
- Knowledge of basic EDA tools such as Cadence, Synopsys, Mentor, or Spectre/HSPICE.
- Exposure to analog design concepts including Bandgap, Voltage Regulator, Delta Sigma Analog to Digital Converter, Oscillator, and PLL.
Nice to have
- AI expertise.
Skills: analog verification, testbench, behavioral modeling, Spectre, simulation
More semiconductor jobs: Verification engineer jobs
First seen in our index 4 days ago, well below the 59-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1412
|
Median days since first seen
59 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | STMicroelectronics | All employers we track in this specialty (1412 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 16 | 1412 |
| Open roles in the wider Digital Design & Verification family | 30 | 3617 · 122 employers |
| Median days since first seen | 43 d | 59 d (+16 d vs this employer) |
| Median salary (USD postings) | n/a | $185k |
Skills observed across this category: analog verification, testbench, behavioral modeling, Spectre, simulation
Who's hiring in this category
- Qualcomm · 138 open roles · median 52 d
- NVIDIA · 109 open roles · median 74 d
- Apple · 107 open roles · median 17 d
- Synopsys · 90 open roles · median 53 d
- AMD · 81 open roles · median 65 d
- SiFive · 57 open roles · median 72 d
How we counted: 1412 open Design Verification (Design Verification) roles from 101 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.
