Originally posted 23 September 2026 by the employer.
About the role
This role involves defining and executing comprehensive performance test plans across the full verification stack, from cycle-accurate performance models to silicon bringup, to ensure product performance.
What you'll do
- Partner with System Architecture and Design/Verification teams to define comprehensive performance test plans.
- Drive full-chip SoC performance verification across all real engines and subsystems using realistic concurrent workloads.
- Execute performance test plans across cycle-accurate performance models, RTL simulation, emulation platforms, and silicon.
- Debug performance failures through waveform analysis, signal-level queries, trace analysis, and system-level profiling.
- Influence architecture and microarchitecture decisions by surfacing performance data and trade-off analysis.
- Develop and maintain performance workloads, test suites, infrastructure, and automated regression flows.
- Drive methodology improvements to reduce verification turnaround time and enable earlier performance insight.
What you'll need
- B.E./B.Tech or M.S./M.Tech (or equivalent experience) in Electrical Engineering, Computer Science, or a related field.
- 3+ years of relevant experience in SoC or system-level architecture, performance verification, or hardware validation.
- Strong understanding of SoC architecture including GPU and CPU pipelines, memory subsystem design (caches, DRAM controllers, coherency), Network-on-Chip (NoC)/fabric architecture, and high-speed IO interfaces.
- Hands-on experience with RTL simulation and debug, including waveform-based debug and signal-level querying.
- Solid programming skills in Python and C/C++; scripting proficiency in Bash/Python for automation and analysis.
- Strong debugging, data analysis, and statistical analysis skills.
- Experience with or exposure to pre-silicon performance analysis methodologies, including performance models, cycle-approximate simulators, or emulation platforms.
Skills: performance verification, RTL simulation, emulation platforms, silicon bringup, waveform analysis, SoC architecture
This role has been open 0 days — well below the 58-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1168
|
Median days open
58 d
|
Median salary
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1168 roles · 94 employers) |
|---|---|---|
| Open roles in this specialty | 88 | 1168 |
| Open roles in the wider Digital Design & Verification family | 244 | 3096 · 114 employers |
| Median days open | 69 d | 58 d (+11 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: performance verification, RTL simulation, emulation platforms, silicon bringup, waveform analysis, SoC architecture
Who's hiring in this category
- Qualcomm · 111 open roles · median 47 d
- AMD · 105 open roles · median 35 d
- NVIDIA (this employer) · 86 open roles · median 69 d
- Synopsys · 64 open roles · median 18 d
- SiFive · 54 open roles · median 50 d
- Micron Technology · 53 open roles · median 105 d
How we counted: 1168 open Design Verification (Design Verification) roles from 94 employers tracked in the SemiconductorJobs index, counted 23 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.