Applications Engineer, Sr. Staff Engineer
Originally posted 15 September 2026 by the employer.
About the role
This role involves supporting customer adoption of Fusion Compiler by diagnosing and resolving complex place and route issues for advanced node designs. You will lead technical engagements, define deployment strategies, and roll out new product methodologies through training and enablement.
What you'll do
- Support customer adoption of Fusion Compiler by diagnosing complex place and route issues and driving resolution with engineering teams. - Lead technical engagements with advanced node customers, defining deployment strategies that align tool capabilities with design goals and constraints. - Roll out new product methodologies by designing and delivering training sessions, workshops, and hands-on enablement for customer engineering teams. - Serve as the technical voice of the customer to the product team, translating field feedback into actionable feature requests and roadmap input. - Collaborate with account teams to shape technical solutions during pre-sales and post-deployment phases. - Debug and optimize customer flows across design planning, placement, clock tree synthesis, routing, and timing closure using Fusion Compiler and related Synopsys tools.
What you'll need
- Bachelor's degree in Electrical Engineering or equivalent. - Deep expertise in place and route methodologies, including floorplanning, placement optimization, clock tree synthesis, routing, and timing closure. - Proven experience with Synopsys Fusion Compiler in a production design environment or customer-facing role. - Strong working knowledge of static timing analysis (STA) and low power design flows, including multi-voltage domains and power gating techniques. - Proficiency in TCL scripting for automation, flow customization, and debug.
Skills: Fusion Compiler, place and route, timing closure, advanced node designs, TCL scripting
This role has been open 27 days — below the 28-day median for Applications FAE roles.
Applications FAE · EDA Tools
|
Open roles in category
103
|
Median days open
28 d
|
Median salary
$162k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (103 roles · 11 employers) |
|---|---|---|
| Open roles in this specialty | 53 | 103 |
| Median days open | 25 d | 28 d (−3 d vs this employer) |
| Median salary (USD postings) | — | $162k |
Skills observed across this category: Fusion Compiler, place and route, timing closure, advanced node designs, TCL scripting
Who's hiring in this category
- Synopsys (this employer) · 53 open roles · median 25 d
- Cadence Design Systems · 24 open roles · median 46 d
- Renesas Electronics · 9 open roles · median 61 d
- Keysight Technologies · 8 open roles · median 69 d
- AMD · 2 open roles · median 86 d
- Arteris · 2 open roles · median 113 d
How we counted: 103 open Applications FAE (EDA Tools) roles from 11 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.