Analog Design Intern, MS - Summer 2027
$38 - $76 USD yearly
Originally posted 4 September 2026 by the employer.
About the role
This role involves the design and verification of test chip experiments. The Central Engineering Test Chip Development team provides hardware validation for custom SRAM, logic, I/O, and security circuits in advanced semiconductor technology nodes.
What you'll do
- Design and verify test chip experiments using Verilog simulation.
- Develop, generate, simulate, and debug Verilog-based test patterns for hardware validation of test chip experiments.
- Develop and maintain laboratory environments for hardware debug, diagnostics, characterization, and measurement data collection.
- Create software tools and automation scripts (Perl, Python, and Tcl) for design support, hardware characterization, laboratory measurements, data processing, and results analysis.
- Analyze, summarize, document, and present characterization and validation results to engineering teams and stakeholders.
What you'll need
- Currently enrolled in a Master’s Degree in MSEE, MSCE, or a related field with an expected graduation date of Fall 2027 – Summer 2028.
- Strong understanding of digital logic circuits, memory architectures, I/O circuits, and semiconductor device physics.
- Proven experience in design and development.
- Proficiency in Linux/Unix environments.
- Strong programming and scripting skills in Perl and Python.
Skills: verify test chip experiments, Verilog simulation, Verilog-based test patterns, hardware validation, digital logic circuits
This role has been open 24 days — well below the 63-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1169
|
Median days open
63 d
|
Median salary
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (1169 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 1169 |
| Open roles in the wider Digital Design & Verification family | 29 | 3113 · 115 employers |
| Median days open | 24 d | 63 d (−39 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: verify test chip experiments, Verilog simulation, Verilog-based test patterns, hardware validation, digital logic circuits
Who's hiring in this category
- AMD · 104 open roles · median 39 d
- Qualcomm · 97 open roles · median 53 d
- NVIDIA · 86 open roles · median 70 d
- Synopsys · 62 open roles · median 23 d
- SiFive · 57 open roles · median 56 d
- NXP Semiconductors · 52 open roles · median 76 d
How we counted: 1169 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.