AI Processor Hardware/Software Integration Engineer Intern (Summer 2027)
$20 - $40 USD hourly
Focus on hands-on hardware/software integration and validation of RISC-V CPUs and AI accelerators across simulation, emulation, and FPGA platforms.
Originally posted 11 November 2026 by the employer.
About the role
This role focuses on hands-on hardware/software integration and validation of RISC-V CPUs and AI accelerators. You will work across hardware, software, AI workloads, and benchmarking to support Physical AI products.
What you'll do
- Execute compliance tests, regressions, benchmarks, and AI workloads across simulation, emulation, FPGA, and hardware platforms.
- Reproduce, debug, document, and track failures using logs, traces, waveforms, and performance counters.
- Validate CPU, NPU, memory, interrupt, exception, and software execution features with guidance from senior engineers.
- Develop automation for test execution, result checking, reporting, and dashboards.
- Collaborate with architecture, RTL, verification, compiler, software, performance, and infrastructure teams to resolve issues.
- Document test procedures and findings, and communicate progress clearly across globally distributed teams.
What you'll need
- Currently at least a sophomore pursuing a Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, Computer Science, Software Engineering, or related field with a minimum 3.0 GPA.
- Academic, research, or project experience in computer architecture, embedded systems, software testing, or machine learning systems.
- Programming experience in Python and C or C++, along with basic Linux, Shell, and Git skills.
- Foundational knowledge of CPU architecture, memory systems, operating systems, and software development.
- Ability to work at least 40 hours per week during the internship.
Nice to have
- Prior related internship or co-op experience.
- Coursework or projects involving RISC-V or NPU systems.
- Familiarity with Assembly, instruction traces, waveforms, Linux, or low-level software.
- Exposure to ONNX, PyTorch, TensorFlow, MLPerf, neural network quantization, or AI inference workloads.
- Participation in capstone or open-source projects, engineering competitions, or laboratory research.
Skills: NPU, FPGA, emulation, benchmarks, Python
More semiconductor jobs: GlobalFoundries jobs · Silicon validation jobs · Richardson jobs
First seen in our index 0 days ago, well below the 42-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
467
|
Median days since first seen
42 d
|
Category median salary (all employers)
$168k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | GlobalFoundries | All employers we track in this specialty (467 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 467 |
| Open roles in the wider Silicon Validation & Test family | 13 | 2423 · 121 employers |
| Median days since first seen | 0 d | 42 d (+42 d vs this employer) |
| Median salary (USD postings) | n/a | $168k |
Skills observed across this category: NPU, FPGA, emulation, benchmarks, Python
Who's hiring in this category
- AMD · 62 open roles · median 42 d
- Qualcomm · 41 open roles · median 39 d
- Micron Technology · 31 open roles · median 49 d
- Apple · 29 open roles · median 19 d
- NVIDIA · 26 open roles · median 42 d
- Microchip Technology · 23 open roles · median 88 d
How we counted: 467 open Post-Silicon Validation (Silicon Validation) roles from 67 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Silicon Validation & Test family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.