Advanced Packaging Technology & Integration Leader
$200,000 - $275,000 USD yearly
Lead technology pathfinding across hybrid bonding, TSVs, interposers, and heterogeneous 3D integration.
Originally posted 30 October 2026 by the employer.
About the role
Applied Materials is seeking an Advanced Packaging Technology & Integration Leader to guide the development of semiconductor packaging and 3D integration technologies. The role drives technology development across hybrid bonding, through-silicon vias (TSVs), interposers, bridge-die architectures, and heterogeneous integration.
What you'll do
- Develop semiconductor packaging technologies from first principles, converting early concepts into experimentally testable structures, integration flows, and technology demonstrations.
- Establish technology roadmaps connecting future device and package requirements to new materials, unit processes, equipment capabilities, and integration schemes.
- Lead multidisciplinary teams across materials science, unit-process development, integration, device/package architecture, modeling, characterization, and equipment.
- Direct process-integration strategies addressing interactions among deposition, etch, CMP, cleans, bonding, lithography, metallization, and wafer thinning.
- Define integration experiments and learning cycles that identify root causes involving thermal budget, contamination, stress, topology, alignment, and reliability.
- Engage with logic, memory, foundry, OSAT, and AI/HPC customers to translate architecture and scaling needs into technology programs.
What you'll need
- Degree in Materials Science, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Applied Physics, or equivalent demonstrated semiconductor technology-development expertise.
- Demonstrated experience developing semiconductor technologies or integration schemes from early concept through experimental validation.
- Deep understanding of semiconductor process integration across deposition, etch, CMP, lithography, metallization, and wafer thinning.
- Expertise across hybrid bonding, TSV technology, 2.5D/3D integration, interposers, bridge die, chiplet integration, or thin-wafer processing.
- Technical background in mechanical stress, wafer warpage, CMP and surface preparation, or semiconductor/package reliability.
- Demonstrated record of leading complex multidisciplinary semiconductor technology-development programs and mentoring engineering staff.
Nice to have
- Experience developing technology for AI/HPC, HBM, chiplets, logic-memory integration, or high-performance heterogeneous systems.
- Experience working across the semiconductor ecosystem, including device manufacturers, foundries, OSATs, equipment companies, material suppliers, or research organizations.
- Experience translating future device/package architectures into semiconductor process and equipment requirements.
- Track record of technical innovation demonstrated through patents, publications, technology transfers, or product/process introductions.
- Experience moving technology across the transition from pathfinding/R&D into product development or manufacturing.
More semiconductor jobs: Applied Materials jobs · Process engineer jobs · Santa Clara jobs
This role has been open 0 days — well below the 43-day median for Process Integration roles.
Process Integration · Advanced Packaging
|
Open roles in category
88
|
Median days open
43 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Applied Materials | All employers we track in this specialty (88 roles · 22 employers) |
|---|---|---|
| Open roles in this specialty | 10 | 88 |
| Open roles in the wider Process, Fab & Equipment family | 1156 | 10112 · 105 employers |
| Median days open | 43 d | 43 d (same as this employer) |
| Median salary (USD postings) | — | $187k |
Who's hiring in this category
- Micron Technology · 17 open roles · median 43 d
- SkyWater Technology · 13 open roles · median 9 d
- GlobalFoundries · 11 open roles · median 129 d
- Applied Materials (this employer) · 9 open roles · median 43 d
- Intel Corporation · 7 open roles · median 37 d
- Renesas Electronics · 6 open roles · median 41 d
How we counted: 88 open Process Integration (Advanced Packaging) roles from 22 employers tracked in the SemiconductorJobs index, counted 30 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.