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AMD

2027 PhD Analog/Mixed-Signal SerDes Design Intern/Co-op - CA, San Jose, United States

AMD Remote friendly (US, CA, San Jose, United States) Internship 1 month ago
Analog & Mixed-Signal Design

Originally posted 11 September 2026 by the employer.

Contribute to the development of high-speed communication and optical interconnect technologies.

About the role

This role involves contributing to the development of high-speed communication and optical interconnect technologies. You will gain hands-on experience with advanced analog and mixed-signal circuit design.

What you'll do

  • Help define circuit architectures optimized for high-bandwidth electrical and optical links.
  • Perform link-level simulations using MATLAB and/or SPICE to evaluate and validate proposed architectures.
  • Contribute to the design and modeling of on-die RF passive components, including inductors, capacitors, and optical structures.
  • Assist in the design and implementation of key circuit building blocks including DACs, SAR-ADCs, sample-and-hold circuits, analog front ends, PLLs, reference generation circuits, and clock distribution networks in advanced FinFET technologies.
  • Gain exposure to the design of high-speed ADC-based receivers, DAC-based transmitters, and silicon-photonics transceivers.

What you'll need

  • PhD student currently pursuing a degree in Electrical Engineering or a closely related field.
  • Experience in the design and simulation of analog and mixed-signal circuits such as ADCs, DACs, CTLEs, PLLs, and clocking circuits for SerDes applications.
  • Strong understanding of high-speed SerDes architectures and circuit design principles.
  • Experience using MATLAB, SPICE, and other industry-standard CAD tools for simulation and design implementation.
  • Hands-on experience with CMOS circuit design in advanced technology nodes.

Nice to have

  • Experience designing wireline and/or optical transceiver building blocks.

Skills: Analog/Mixed-Signal Design, SerDes, optical interconnect, high-speed communication, FinFET

Market context

This role has been open 33 days — well below the 78-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category
241
Median days open
78 d
Median salary
$176k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How AMD compares in High-Speed IO/SerDes Design hiring
Metric AMD All employers we track in this specialty (241 roles · 47 employers)
Open roles in this specialty 29 241
Open roles in the wider Analog & Mixed-Signal family 37 1412 · 104 employers
Median days open 36 d 78 d (−42 d vs this employer)
Median salary (USD postings) — $176k

Skills observed across this category: Analog/Mixed-Signal Design, SerDes, optical interconnect, high-speed communication, FinFET

Who's hiring in this category

  • Synopsys · 31 open roles · median 30 d
  • AMD (this employer) · 30 open roles · median 39 d
  • Cadence Design Systems · 19 open roles · median 188 d
  • Qualcomm · 19 open roles · median 57 d
  • Micron Technology · 14 open roles · median 53 d
  • Apple · 12 open roles · median 16 d

How we counted: 241 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 47 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.

Apply now
US, CA, San Jose, United States
Hybrid
Internship
1 month ago

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