Advanced Packaging, HBM and Silicon Photonics Jobs: Who’s Hiring
Micron accounts for 288 of the 693 active postings in our job index with packaging, HBM, CoWoS or silicon photonics in the job title. That’s just over 41%.
The job postings are at chipmakers, equipment suppliers and companies developing optical interconnects.
Open positions by company
| Company | Active postings |
|---|---|
| Micron Technology | 288 |
| Intel | 38 |
| GlobalFoundries | 34 |
| Applied Materials | 27 |
| AMD | 25 |
| Amazon | 17 |
| Teradyne | 14 |
| Lightmatter | 13 |
| Other employers | 237 |
| Total | 693 |
The 693 postings above were identified by job title. Looking at full descriptions, our job index identifies 1,090 positions involving packaging, chiplets or photonics.
Within that broader group, 256 focus on silicon architecture and design: 111 in chiplet and advanced packaging design, and 145 in optical and photonics IC design. Another 508 cover packaging manufacturing, substrates and assembly.
Where the positions are
- Micron: Openings across Boise, San Jose, Taichung and Singapore.
- Intel: Packaging positions in Chandler and Hillsboro.
- GlobalFoundries: Silicon photonics and packaging development positions in Malta and Singapore.
- AMD: Packaging and substrate positions in Austin and Santa Clara.
- Amazon: Custom silicon packaging positions in Austin and Cupertino.
- Lightmatter: Photonic packaging and optical interconnect positions in Mountain View and Boston.
Published US salaries
Of the 693 positions identified by job title, 114 US postings include salary ranges. The average listed minimum is $143,300, and the average listed maximum is $234,600.
| Company | Average listed minimum | Average listed maximum |
|---|---|---|
| AMD | $154,400 | $262,800 |
| Micron Technology | $143,900 | $278,100 |
| Intel | $146,200 | $240,200 |
| Teradyne | $149,300 | $239,000 |
Positions with published salaries include packaging architects and substrate design leads at AMD, HBM package development engineers and module quality leads at Micron, substrate assembly and Foveros process engineers at Intel, and packaging test development leads at Teradyne.
These are advertised US base salaries, excluding bonuses and equity. Each company’s figures reflect a different mix of positions and experience levels.
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